PCem
changeset 74:df66658b3f06
Switched to OPL emulation to DOSBox dbopl emulator.
Fixed SB Pro v2.
Clarified GPL license in readme.txt.
| author | TomW |
|---|---|
| date | Thu Feb 27 19:42:06 2014 +0000 |
| parents | 23e2e608e444 |
| children | 9b0c068452e5 |
| files | readme.txt src/Makefile.mingw src/dosbox/dbopl.cpp src/dosbox/dbopl.h src/mame/fmopl.c src/mame/fmopl.h src/mame/ymf262.c src/mame/ymf262.h src/sound.c src/sound_dbopl.cc src/sound_dbopl.h src/sound_opl.c src/sound_opl.h |
| diffstat | 13 files changed, 1985 insertions(+), 5609 deletions(-) [+] |
line diff
1.1 --- a/readme.txt Tue Feb 11 19:44:32 2014 +0000 1.2 +++ b/readme.txt Thu Feb 27 19:42:06 2014 +0000 1.3 @@ -1,5 +1,7 @@ 1.4 PCem v8.1 1.5 1.6 +PCem is licensed under the GPL, see COPYING for more details. 1.7 + 1.8 Changes since v8: 1.9 1.10 - Fixed various issues with ROM detection/loading 1.11 @@ -403,8 +405,8 @@ 1.12 voices. In stereo! 1.13 1.14 Adlib 1.15 -Has a Yamaha YM3812, giving 9 voices of 2 op FM, or 6 voices plus a useless section. PCem 1.16 -uses Jarek Burczynski's emulator for this. 1.17 +Has a Yamaha YM3812, giving 9 voices of 2 op FM, or 6 voices plus a rhythm section. PCem 1.18 +uses the DOSBox dbopl emulator. 1.19 1.20 Adlib Gold 1.21 OPL3 with YM318Z 12-bit digital section. Possibly some bugs (not a lot of software to test).
2.1 --- a/src/Makefile.mingw Tue Feb 11 19:44:32 2014 +0000 2.2 +++ b/src/Makefile.mingw Thu Feb 27 19:42:06 2014 +0000 2.3 @@ -1,4 +1,4 @@ 2.4 -VPATH = . mame 2.5 +VPATH = . dosbox 2.6 CPP = g++.exe 2.7 CC = gcc.exe 2.8 WINDRES = windres.exe 2.9 @@ -9,7 +9,7 @@ 2.10 keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o lpt.o mcr.o mem.o model.o \ 2.11 mouse.o mouse_ps2.o mouse_serial.o neat.o nvr.o olivetti_m24.o \ 2.12 opti.o pc.o pci.o pic.o piix.o pit.o ppi.o rom.o serial.o sis496.o sound.o sound_ad1848.o sound_adlib.o \ 2.13 - sound_adlibgold.o sound_cms.o sound_emu8k.o sound_gus.o sound_mpu401_uart.o sound_opl.o \ 2.14 + sound_adlibgold.o sound_cms.o sound_dbopl.o sound_emu8k.o sound_gus.o sound_mpu401_uart.o sound_opl.o \ 2.15 sound_pas16.o sound_sb.o sound_sb_dsp.o sound_sn76489.o sound_speaker.o \ 2.16 sound_wss.o soundopenal.o timer.o um8881f.o um8669f.o vid_ati_eeprom.o \ 2.17 vid_ati_mach64.o vid_ati18800.o vid_ati28800.o vid_ati68860_ramdac.o vid_cga.o \ 2.18 @@ -20,7 +20,7 @@ 2.19 vid_tandy.o vid_tgui9440.o vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o vid_vga.o \ 2.20 vid_voodoo.o video.o wd76c10.o win.o win-d3d.o win-d3d-fs.o win-ddraw.o win-ddraw-fs.o win-keyboard.o win-midi.o \ 2.21 win-mouse.o win-timer.o win-video.o x86seg.o x87.o xtide.o pc.res 2.22 -FMOBJ = fmopl.o ymf262.o 2.23 +FMOBJ = dbopl.o 2.24 2.25 2.26 LIBS = -mwindows -lwinmm -lalut -lopenal32 -lddraw -ldinput -ldxguid -ld3d9
3.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 3.2 +++ b/src/dosbox/dbopl.cpp Thu Feb 27 19:42:06 2014 +0000 3.3 @@ -0,0 +1,1520 @@ 3.4 +/* 3.5 + * Copyright (C) 2002-2010 The DOSBox Team 3.6 + * 3.7 + * This program is free software; you can redistribute it and/or modify 3.8 + * it under the terms of the GNU General Public License as published by 3.9 + * the Free Software Foundation; either version 2 of the License, or 3.10 + * (at your option) any later version. 3.11 + * 3.12 + * This program is distributed in the hope that it will be useful, 3.13 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 3.14 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 3.15 + * GNU General Public License for more details. 3.16 + * 3.17 + * You should have received a copy of the GNU General Public License 3.18 + * along with this program; if not, write to the Free Software 3.19 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 3.20 + */ 3.21 + 3.22 +/* 3.23 + DOSBox implementation of a combined Yamaha YMF262 and Yamaha YM3812 emulator. 3.24 + Enabling the opl3 bit will switch the emulator to stereo opl3 output instead of regular mono opl2 3.25 + Except for the table generation it's all integer math 3.26 + Can choose different types of generators, using muls and bigger tables, try different ones for slower platforms 3.27 + The generation was based on the MAME implementation but tried to have it use less memory and be faster in general 3.28 + MAME uses much bigger envelope tables and this will be the biggest cause of it sounding different at times 3.29 + 3.30 + //TODO Don't delay first operator 1 sample in opl3 mode 3.31 + //TODO Maybe not use class method pointers but a regular function pointers with operator as first parameter 3.32 + //TODO Fix panning for the Percussion channels, would any opl3 player use it and actually really change it though? 3.33 + //TODO Check if having the same accuracy in all frequency multipliers sounds better or not 3.34 + 3.35 + //DUNNO Keyon in 4op, switch to 2op without keyoff. 3.36 +*/ 3.37 + 3.38 +/* $Id: dbopl.cpp,v 1.10 2009-06-10 19:54:51 harekiet Exp $ */ 3.39 + 3.40 +#include <math.h> 3.41 +#include <stdlib.h> 3.42 +#include <string.h> 3.43 +//#include "dosbox.h" 3.44 +#include "dbopl.h" 3.45 + 3.46 + 3.47 +#ifndef PI 3.48 +#define PI 3.14159265358979323846 3.49 +#endif 3.50 + 3.51 +namespace DBOPL { 3.52 + 3.53 +#define OPLRATE ((double)(14318180.0 / 288.0)) 3.54 +#define TREMOLO_TABLE 52 3.55 + 3.56 +//Try to use most precision for frequencies 3.57 +//Else try to keep different waves in synch 3.58 +//#define WAVE_PRECISION 1 3.59 +#ifndef WAVE_PRECISION 3.60 +//Wave bits available in the top of the 32bit range 3.61 +//Original adlib uses 10.10, we use 10.22 3.62 +#define WAVE_BITS 10 3.63 +#else 3.64 +//Need some extra bits at the top to have room for octaves and frequency multiplier 3.65 +//We support to 8 times lower rate 3.66 +//128 * 15 * 8 = 15350, 2^13.9, so need 14 bits 3.67 +#define WAVE_BITS 14 3.68 +#endif 3.69 +#define WAVE_SH ( 32 - WAVE_BITS ) 3.70 +#define WAVE_MASK ( ( 1 << WAVE_SH ) - 1 ) 3.71 + 3.72 +//Use the same accuracy as the waves 3.73 +#define LFO_SH ( WAVE_SH - 10 ) 3.74 +//LFO is controlled by our tremolo 256 sample limit 3.75 +#define LFO_MAX ( 256 << ( LFO_SH ) ) 3.76 + 3.77 + 3.78 +//Maximum amount of attenuation bits 3.79 +//Envelope goes to 511, 9 bits 3.80 +#if (DBOPL_WAVE == WAVE_TABLEMUL ) 3.81 +//Uses the value directly 3.82 +#define ENV_BITS ( 9 ) 3.83 +#else 3.84 +//Add 3 bits here for more accuracy and would have to be shifted up either way 3.85 +#define ENV_BITS ( 9 ) 3.86 +#endif 3.87 +//Limits of the envelope with those bits and when the envelope goes silent 3.88 +#define ENV_MIN 0 3.89 +#define ENV_EXTRA ( ENV_BITS - 9 ) 3.90 +#define ENV_MAX ( 511 << ENV_EXTRA ) 3.91 +#define ENV_LIMIT ( ( 12 * 256) >> ( 3 - ENV_EXTRA ) ) 3.92 +#define ENV_SILENT( _X_ ) ( (_X_) >= ENV_LIMIT ) 3.93 + 3.94 +//Attack/decay/release rate counter shift 3.95 +#define RATE_SH 24 3.96 +#define RATE_MASK ( ( 1 << RATE_SH ) - 1 ) 3.97 +//Has to fit within 16bit lookuptable 3.98 +#define MUL_SH 16 3.99 + 3.100 +//Check some ranges 3.101 +#if ENV_EXTRA > 3 3.102 +#error Too many envelope bits 3.103 +#endif 3.104 + 3.105 + 3.106 +//How much to substract from the base value for the final attenuation 3.107 +static const Bit8u KslCreateTable[16] = { 3.108 + //0 will always be be lower than 7 * 8 3.109 + 64, 32, 24, 19, 3.110 + 16, 12, 11, 10, 3.111 + 8, 6, 5, 4, 3.112 + 3, 2, 1, 0, 3.113 +}; 3.114 + 3.115 +#define M(_X_) ((Bit8u)( (_X_) * 2)) 3.116 +static const Bit8u FreqCreateTable[16] = { 3.117 + M(0.5), M(1 ), M(2 ), M(3 ), M(4 ), M(5 ), M(6 ), M(7 ), 3.118 + M(8 ), M(9 ), M(10), M(10), M(12), M(12), M(15), M(15) 3.119 +}; 3.120 +#undef M 3.121 + 3.122 +//We're not including the highest attack rate, that gets a special value 3.123 +static const Bit8u AttackSamplesTable[13] = { 3.124 + 69, 55, 46, 40, 3.125 + 35, 29, 23, 20, 3.126 + 19, 15, 11, 10, 3.127 + 9 3.128 +}; 3.129 +//On a real opl these values take 8 samples to reach and are based upon larger tables 3.130 +static const Bit8u EnvelopeIncreaseTable[13] = { 3.131 + 4, 5, 6, 7, 3.132 + 8, 10, 12, 14, 3.133 + 16, 20, 24, 28, 3.134 + 32, 3.135 +}; 3.136 + 3.137 +#if ( DBOPL_WAVE == WAVE_HANDLER ) || ( DBOPL_WAVE == WAVE_TABLELOG ) 3.138 +static Bit16u ExpTable[ 256 ]; 3.139 +#endif 3.140 + 3.141 +#if ( DBOPL_WAVE == WAVE_HANDLER ) 3.142 +//PI table used by WAVEHANDLER 3.143 +static Bit16u SinTable[ 512 ]; 3.144 +#endif 3.145 + 3.146 +#if ( DBOPL_WAVE > WAVE_HANDLER ) 3.147 +//Layout of the waveform table in 512 entry intervals 3.148 +//With overlapping waves we reduce the table to half it's size 3.149 + 3.150 +// | |//\\|____|WAV7|//__|/\ |____|/\/\| 3.151 +// |\\//| | |WAV7| | \/| | | 3.152 +// |06 |0126|17 |7 |3 |4 |4 5 |5 | 3.153 + 3.154 +//6 is just 0 shifted and masked 3.155 + 3.156 +static Bit16s WaveTable[ 8 * 512 ]; 3.157 +//Distance into WaveTable the wave starts 3.158 +static const Bit16u WaveBaseTable[8] = { 3.159 + 0x000, 0x200, 0x200, 0x800, 3.160 + 0xa00, 0xc00, 0x100, 0x400, 3.161 + 3.162 +}; 3.163 +//Mask the counter with this 3.164 +static const Bit16u WaveMaskTable[8] = { 3.165 + 1023, 1023, 511, 511, 3.166 + 1023, 1023, 512, 1023, 3.167 +}; 3.168 + 3.169 +//Where to start the counter on at keyon 3.170 +static const Bit16u WaveStartTable[8] = { 3.171 + 512, 0, 0, 0, 3.172 + 0, 512, 512, 256, 3.173 +}; 3.174 +#endif 3.175 + 3.176 +#if ( DBOPL_WAVE == WAVE_TABLEMUL ) 3.177 +static Bit16u MulTable[ 384 ]; 3.178 +#endif 3.179 + 3.180 +static Bit8u KslTable[ 8 * 16 ]; 3.181 +static Bit8u TremoloTable[ TREMOLO_TABLE ]; 3.182 +//Start of a channel behind the chip struct start 3.183 +static Bit16u ChanOffsetTable[32]; 3.184 +//Start of an operator behind the chip struct start 3.185 +static Bit16u OpOffsetTable[64]; 3.186 + 3.187 +//The lower bits are the shift of the operator vibrato value 3.188 +//The highest bit is right shifted to generate -1 or 0 for negation 3.189 +//So taking the highest input value of 7 this gives 3, 7, 3, 0, -3, -7, -3, 0 3.190 +static const Bit8s VibratoTable[ 8 ] = { 3.191 + 1 - 0x00, 0 - 0x00, 1 - 0x00, 30 - 0x00, 3.192 + 1 - 0x80, 0 - 0x80, 1 - 0x80, 30 - 0x80 3.193 +}; 3.194 + 3.195 +//Shift strength for the ksl value determined by ksl strength 3.196 +static const Bit8u KslShiftTable[4] = { 3.197 + 31,1,2,0 3.198 +}; 3.199 + 3.200 +//Generate a table index and table shift value using input value from a selected rate 3.201 +static void EnvelopeSelect( Bit8u val, Bit8u& index, Bit8u& shift ) { 3.202 + if ( val < 13 * 4 ) { //Rate 0 - 12 3.203 + shift = 12 - ( val >> 2 ); 3.204 + index = val & 3; 3.205 + } else if ( val < 15 * 4 ) { //rate 13 - 14 3.206 + shift = 0; 3.207 + index = val - 12 * 4; 3.208 + } else { //rate 15 and up 3.209 + shift = 0; 3.210 + index = 12; 3.211 + } 3.212 +} 3.213 + 3.214 +#if ( DBOPL_WAVE == WAVE_HANDLER ) 3.215 +/* 3.216 + Generate the different waveforms out of the sine/exponetial table using handlers 3.217 +*/ 3.218 +static inline Bits MakeVolume( Bitu wave, Bitu volume ) { 3.219 + Bitu total = wave + volume; 3.220 + Bitu index = total & 0xff; 3.221 + Bitu sig = ExpTable[ index ]; 3.222 + Bitu exp = total >> 8; 3.223 +#if 0 3.224 + //Check if we overflow the 31 shift limit 3.225 + if ( exp >= 32 ) { 3.226 + LOG_MSG( "WTF %d %d", total, exp ); 3.227 + } 3.228 +#endif 3.229 + return (sig >> exp); 3.230 +}; 3.231 + 3.232 +static Bits DB_FASTCALL WaveForm0( Bitu i, Bitu volume ) { 3.233 + Bits neg = 0 - (( i >> 9) & 1);//Create ~0 or 0 3.234 + Bitu wave = SinTable[i & 511]; 3.235 + return (MakeVolume( wave, volume ) ^ neg) - neg; 3.236 +} 3.237 +static Bits DB_FASTCALL WaveForm1( Bitu i, Bitu volume ) { 3.238 + Bit32u wave = SinTable[i & 511]; 3.239 + wave |= ( ( (i ^ 512 ) & 512) - 1) >> ( 32 - 12 ); 3.240 + return MakeVolume( wave, volume ); 3.241 +} 3.242 +static Bits DB_FASTCALL WaveForm2( Bitu i, Bitu volume ) { 3.243 + Bitu wave = SinTable[i & 511]; 3.244 + return MakeVolume( wave, volume ); 3.245 +} 3.246 +static Bits DB_FASTCALL WaveForm3( Bitu i, Bitu volume ) { 3.247 + Bitu wave = SinTable[i & 255]; 3.248 + wave |= ( ( (i ^ 256 ) & 256) - 1) >> ( 32 - 12 ); 3.249 + return MakeVolume( wave, volume ); 3.250 +} 3.251 +static Bits DB_FASTCALL WaveForm4( Bitu i, Bitu volume ) { 3.252 + //Twice as fast 3.253 + i <<= 1; 3.254 + Bits neg = 0 - (( i >> 9) & 1);//Create ~0 or 0 3.255 + Bitu wave = SinTable[i & 511]; 3.256 + wave |= ( ( (i ^ 512 ) & 512) - 1) >> ( 32 - 12 ); 3.257 + return (MakeVolume( wave, volume ) ^ neg) - neg; 3.258 +} 3.259 +static Bits DB_FASTCALL WaveForm5( Bitu i, Bitu volume ) { 3.260 + //Twice as fast 3.261 + i <<= 1; 3.262 + Bitu wave = SinTable[i & 511]; 3.263 + wave |= ( ( (i ^ 512 ) & 512) - 1) >> ( 32 - 12 ); 3.264 + return MakeVolume( wave, volume ); 3.265 +} 3.266 +static Bits DB_FASTCALL WaveForm6( Bitu i, Bitu volume ) { 3.267 + Bits neg = 0 - (( i >> 9) & 1);//Create ~0 or 0 3.268 + return (MakeVolume( 0, volume ) ^ neg) - neg; 3.269 +} 3.270 +static Bits DB_FASTCALL WaveForm7( Bitu i, Bitu volume ) { 3.271 + //Negative is reversed here 3.272 + Bits neg = (( i >> 9) & 1) - 1; 3.273 + Bitu wave = (i << 3); 3.274 + //When negative the volume also runs backwards 3.275 + wave = ((wave ^ neg) - neg) & 4095; 3.276 + return (MakeVolume( wave, volume ) ^ neg) - neg; 3.277 +} 3.278 + 3.279 +static const WaveHandler WaveHandlerTable[8] = { 3.280 + WaveForm0, WaveForm1, WaveForm2, WaveForm3, 3.281 + WaveForm4, WaveForm5, WaveForm6, WaveForm7 3.282 +}; 3.283 + 3.284 +#endif 3.285 + 3.286 +/* 3.287 + Operator 3.288 +*/ 3.289 + 3.290 +//We zero out when rate == 0 3.291 +inline void Operator::UpdateAttack( const Chip* chip ) { 3.292 + Bit8u rate = reg60 >> 4; 3.293 + if ( rate ) { 3.294 + Bit8u val = (rate << 2) + ksr; 3.295 + attackAdd = chip->attackRates[ val ]; 3.296 + rateZero &= ~(1 << ATTACK); 3.297 + } else { 3.298 + attackAdd = 0; 3.299 + rateZero |= (1 << ATTACK); 3.300 + } 3.301 +} 3.302 +inline void Operator::UpdateDecay( const Chip* chip ) { 3.303 + Bit8u rate = reg60 & 0xf; 3.304 + if ( rate ) { 3.305 + Bit8u val = (rate << 2) + ksr; 3.306 + decayAdd = chip->linearRates[ val ]; 3.307 + rateZero &= ~(1 << DECAY); 3.308 + } else { 3.309 + decayAdd = 0; 3.310 + rateZero |= (1 << DECAY); 3.311 + } 3.312 +} 3.313 +inline void Operator::UpdateRelease( const Chip* chip ) { 3.314 + Bit8u rate = reg80 & 0xf; 3.315 + if ( rate ) { 3.316 + Bit8u val = (rate << 2) + ksr; 3.317 + releaseAdd = chip->linearRates[ val ]; 3.318 + rateZero &= ~(1 << RELEASE); 3.319 + if ( !(reg20 & MASK_SUSTAIN ) ) { 3.320 + rateZero &= ~( 1 << SUSTAIN ); 3.321 + } 3.322 + } else { 3.323 + rateZero |= (1 << RELEASE); 3.324 + releaseAdd = 0; 3.325 + if ( !(reg20 & MASK_SUSTAIN ) ) { 3.326 + rateZero |= ( 1 << SUSTAIN ); 3.327 + } 3.328 + } 3.329 +} 3.330 + 3.331 +inline void Operator::UpdateAttenuation( ) { 3.332 + Bit8u kslBase = (Bit8u)((chanData >> SHIFT_KSLBASE) & 0xff); 3.333 + Bit32u tl = reg40 & 0x3f; 3.334 + Bit8u kslShift = KslShiftTable[ reg40 >> 6 ]; 3.335 + //Make sure the attenuation goes to the right bits 3.336 + totalLevel = tl << ( ENV_BITS - 7 ); //Total level goes 2 bits below max 3.337 + totalLevel += ( kslBase << ENV_EXTRA ) >> kslShift; 3.338 +} 3.339 + 3.340 +void Operator::UpdateFrequency( ) { 3.341 + Bit32u freq = chanData & (( 1 << 10 ) - 1); 3.342 + Bit32u block = (chanData >> 10) & 0xff; 3.343 +#ifdef WAVE_PRECISION 3.344 + block = 7 - block; 3.345 + waveAdd = ( freq * freqMul ) >> block; 3.346 +#else 3.347 + waveAdd = ( freq << block ) * freqMul; 3.348 +#endif 3.349 + if ( reg20 & MASK_VIBRATO ) { 3.350 + vibStrength = (Bit8u)(freq >> 7); 3.351 + 3.352 +#ifdef WAVE_PRECISION 3.353 + vibrato = ( vibStrength * freqMul ) >> block; 3.354 +#else 3.355 + vibrato = ( vibStrength << block ) * freqMul; 3.356 +#endif 3.357 + } else { 3.358 + vibStrength = 0; 3.359 + vibrato = 0; 3.360 + } 3.361 +} 3.362 + 3.363 +void Operator::UpdateRates( const Chip* chip ) { 3.364 + //Mame seems to reverse this where enabling ksr actually lowers 3.365 + //the rate, but pdf manuals says otherwise? 3.366 + Bit8u newKsr = (Bit8u)((chanData >> SHIFT_KEYCODE) & 0xff); 3.367 + if ( !( reg20 & MASK_KSR ) ) { 3.368 + newKsr >>= 2; 3.369 + } 3.370 + if ( ksr == newKsr ) 3.371 + return; 3.372 + ksr = newKsr; 3.373 + UpdateAttack( chip ); 3.374 + UpdateDecay( chip ); 3.375 + UpdateRelease( chip ); 3.376 +} 3.377 + 3.378 +INLINE Bit32s Operator::RateForward( Bit32u add ) { 3.379 + rateIndex += add; 3.380 + Bit32s ret = rateIndex >> RATE_SH; 3.381 + rateIndex = rateIndex & RATE_MASK; 3.382 + return ret; 3.383 +} 3.384 + 3.385 +template< Operator::State yes> 3.386 +Bits Operator::TemplateVolume( ) { 3.387 + Bit32s vol = volume; 3.388 + Bit32s change; 3.389 + switch ( yes ) { 3.390 + case OFF: 3.391 + return ENV_MAX; 3.392 + case ATTACK: 3.393 + change = RateForward( attackAdd ); 3.394 + if ( !change ) 3.395 + return vol; 3.396 + vol += ( (~vol) * change ) >> 3; 3.397 + if ( vol < ENV_MIN ) { 3.398 + volume = ENV_MIN; 3.399 + rateIndex = 0; 3.400 + SetState( DECAY ); 3.401 + return ENV_MIN; 3.402 + } 3.403 + break; 3.404 + case DECAY: 3.405 + vol += RateForward( decayAdd ); 3.406 + if ( GCC_UNLIKELY(vol >= sustainLevel) ) { 3.407 + //Check if we didn't overshoot max attenuation, then just go off 3.408 + if ( GCC_UNLIKELY(vol >= ENV_MAX) ) { 3.409 + volume = ENV_MAX; 3.410 + SetState( OFF ); 3.411 + return ENV_MAX; 3.412 + } 3.413 + //Continue as sustain 3.414 + rateIndex = 0; 3.415 + SetState( SUSTAIN ); 3.416 + } 3.417 + break; 3.418 + case SUSTAIN: 3.419 + if ( reg20 & MASK_SUSTAIN ) { 3.420 + return vol; 3.421 + } 3.422 + //In sustain phase, but not sustaining, do regular release 3.423 + case RELEASE: 3.424 + vol += RateForward( releaseAdd );; 3.425 + if ( GCC_UNLIKELY(vol >= ENV_MAX) ) { 3.426 + volume = ENV_MAX; 3.427 + SetState( OFF ); 3.428 + return ENV_MAX; 3.429 + } 3.430 + break; 3.431 + } 3.432 + volume = vol; 3.433 + return vol; 3.434 +} 3.435 + 3.436 +static const VolumeHandler VolumeHandlerTable[5] = { 3.437 + &Operator::TemplateVolume< Operator::OFF >, 3.438 + &Operator::TemplateVolume< Operator::RELEASE >, 3.439 + &Operator::TemplateVolume< Operator::SUSTAIN >, 3.440 + &Operator::TemplateVolume< Operator::DECAY >, 3.441 + &Operator::TemplateVolume< Operator::ATTACK > 3.442 +}; 3.443 + 3.444 +INLINE Bitu Operator::ForwardVolume() { 3.445 + return currentLevel + (this->*volHandler)(); 3.446 +} 3.447 + 3.448 + 3.449 +INLINE Bitu Operator::ForwardWave() { 3.450 + waveIndex += waveCurrent; 3.451 + return waveIndex >> WAVE_SH; 3.452 +} 3.453 + 3.454 +void Operator::Write20( const Chip* chip, Bit8u val ) { 3.455 + Bit8u change = (reg20 ^ val ); 3.456 + if ( !change ) 3.457 + return; 3.458 + reg20 = val; 3.459 + //Shift the tremolo bit over the entire register, saved a branch, YES! 3.460 + tremoloMask = (Bit8s)(val) >> 7; 3.461 + tremoloMask &= ~(( 1 << ENV_EXTRA ) -1); 3.462 + //Update specific features based on changes 3.463 + if ( change & MASK_KSR ) { 3.464 + UpdateRates( chip ); 3.465 + } 3.466 + //With sustain enable the volume doesn't change 3.467 + if ( reg20 & MASK_SUSTAIN || ( !releaseAdd ) ) { 3.468 + rateZero |= ( 1 << SUSTAIN ); 3.469 + } else { 3.470 + rateZero &= ~( 1 << SUSTAIN ); 3.471 + } 3.472 + //Frequency multiplier or vibrato changed 3.473 + if ( change & (0xf | MASK_VIBRATO) ) { 3.474 + freqMul = chip->freqMul[ val & 0xf ]; 3.475 + UpdateFrequency(); 3.476 + } 3.477 +} 3.478 + 3.479 +void Operator::Write40( const Chip* /*chip*/, Bit8u val ) { 3.480 + if (!(reg40 ^ val )) 3.481 + return; 3.482 + reg40 = val; 3.483 + UpdateAttenuation( ); 3.484 +} 3.485 + 3.486 +void Operator::Write60( const Chip* chip, Bit8u val ) { 3.487 + Bit8u change = reg60 ^ val; 3.488 + reg60 = val; 3.489 + if ( change & 0x0f ) { 3.490 + UpdateDecay( chip ); 3.491 + } 3.492 + if ( change & 0xf0 ) { 3.493 + UpdateAttack( chip ); 3.494 + } 3.495 +} 3.496 + 3.497 +void Operator::Write80( const Chip* chip, Bit8u val ) { 3.498 + Bit8u change = (reg80 ^ val ); 3.499 + if ( !change ) 3.500 + return; 3.501 + reg80 = val; 3.502 + Bit8u sustain = val >> 4; 3.503 + //Turn 0xf into 0x1f 3.504 + sustain |= ( sustain + 1) & 0x10; 3.505 + sustainLevel = sustain << ( ENV_BITS - 5 ); 3.506 + if ( change & 0x0f ) { 3.507 + UpdateRelease( chip ); 3.508 + } 3.509 +} 3.510 + 3.511 +void Operator::WriteE0( const Chip* chip, Bit8u val ) { 3.512 + if ( !(regE0 ^ val) ) 3.513 + return; 3.514 + //in opl3 mode you can always selet 7 waveforms regardless of waveformselect 3.515 + Bit8u waveForm = val & ( ( 0x3 & chip->waveFormMask ) | (0x7 & chip->opl3Active ) ); 3.516 + regE0 = val; 3.517 +#if ( DBOPL_WAVE == WAVE_HANDLER ) 3.518 + waveHandler = WaveHandlerTable[ waveForm ]; 3.519 +#else 3.520 + waveBase = WaveTable + WaveBaseTable[ waveForm ]; 3.521 + waveStart = WaveStartTable[ waveForm ] << WAVE_SH; 3.522 + waveMask = WaveMaskTable[ waveForm ]; 3.523 +#endif 3.524 +} 3.525 + 3.526 +INLINE void Operator::SetState( Bit8u s ) { 3.527 + state = s; 3.528 + volHandler = VolumeHandlerTable[ s ]; 3.529 +} 3.530 + 3.531 +INLINE bool Operator::Silent() const { 3.532 + if ( !ENV_SILENT( totalLevel + volume ) ) 3.533 + return false; 3.534 + if ( !(rateZero & ( 1 << state ) ) ) 3.535 + return false; 3.536 + return true; 3.537 +} 3.538 + 3.539 +INLINE void Operator::Prepare( const Chip* chip ) { 3.540 + currentLevel = totalLevel + (chip->tremoloValue & tremoloMask); 3.541 + waveCurrent = waveAdd; 3.542 + if ( vibStrength >> chip->vibratoShift ) { 3.543 + Bit32s add = vibrato >> chip->vibratoShift; 3.544 + //Sign extend over the shift value 3.545 + Bit32s neg = chip->vibratoSign; 3.546 + //Negate the add with -1 or 0 3.547 + add = ( add ^ neg ) - neg; 3.548 + waveCurrent += add; 3.549 + } 3.550 +} 3.551 + 3.552 +void Operator::KeyOn( Bit8u mask ) { 3.553 + if ( !keyOn ) { 3.554 + //Restart the frequency generator 3.555 +#if ( DBOPL_WAVE > WAVE_HANDLER ) 3.556 + waveIndex = waveStart; 3.557 +#else 3.558 + waveIndex = 0; 3.559 +#endif 3.560 + rateIndex = 0; 3.561 + SetState( ATTACK ); 3.562 + } 3.563 + keyOn |= mask; 3.564 +} 3.565 + 3.566 +void Operator::KeyOff( Bit8u mask ) { 3.567 + keyOn &= ~mask; 3.568 + if ( !keyOn ) { 3.569 + if ( state != OFF ) { 3.570 + SetState( RELEASE ); 3.571 + } 3.572 + } 3.573 +} 3.574 + 3.575 +INLINE Bits Operator::GetWave( Bitu index, Bitu vol ) { 3.576 +#if ( DBOPL_WAVE == WAVE_HANDLER ) 3.577 + return waveHandler( index, vol << ( 3 - ENV_EXTRA ) ); 3.578 +#elif ( DBOPL_WAVE == WAVE_TABLEMUL ) 3.579 + return (waveBase[ index & waveMask ] * MulTable[ vol >> ENV_EXTRA ]) >> MUL_SH; 3.580 +#elif ( DBOPL_WAVE == WAVE_TABLELOG ) 3.581 + Bit32s wave = waveBase[ index & waveMask ]; 3.582 + Bit32u total = ( wave & 0x7fff ) + vol << ( 3 - ENV_EXTRA ); 3.583 + Bit32s sig = ExpTable[ total & 0xff ]; 3.584 + Bit32u exp = total >> 8; 3.585 + Bit32s neg = wave >> 16; 3.586 + return ((sig ^ neg) - neg) >> exp; 3.587 +#else 3.588 +#error "No valid wave routine" 3.589 +#endif 3.590 +} 3.591 + 3.592 +Bits INLINE Operator::GetSample( Bits modulation ) { 3.593 + Bitu vol = ForwardVolume(); 3.594 + if ( ENV_SILENT( vol ) ) { 3.595 + //Simply forward the wave 3.596 + waveIndex += waveCurrent; 3.597 + return 0; 3.598 + } else { 3.599 + Bitu index = ForwardWave(); 3.600 + index += modulation; 3.601 + return GetWave( index, vol ); 3.602 + } 3.603 +} 3.604 + 3.605 +Operator::Operator() { 3.606 + chanData = 0; 3.607 + freqMul = 0; 3.608 + waveIndex = 0; 3.609 + waveAdd = 0; 3.610 + waveCurrent = 0; 3.611 + keyOn = 0; 3.612 + ksr = 0; 3.613 + reg20 = 0; 3.614 + reg40 = 0; 3.615 + reg60 = 0; 3.616 + reg80 = 0; 3.617 + regE0 = 0; 3.618 + SetState( OFF ); 3.619 + rateZero = (1 << OFF); 3.620 + sustainLevel = ENV_MAX; 3.621 + currentLevel = ENV_MAX; 3.622 + totalLevel = ENV_MAX; 3.623 + volume = ENV_MAX; 3.624 + releaseAdd = 0; 3.625 +} 3.626 + 3.627 +/* 3.628 + Channel 3.629 +*/ 3.630 + 3.631 +Channel::Channel() { 3.632 + old[0] = old[1] = 0; 3.633 + chanData = 0; 3.634 + regB0 = 0; 3.635 + regC0 = 0; 3.636 + maskLeft = -1; 3.637 + maskRight = -1; 3.638 + feedback = 31; 3.639 + fourMask = 0; 3.640 + synthHandler = &Channel::BlockTemplate< sm2FM >; 3.641 +}; 3.642 + 3.643 +void Channel::SetChanData( const Chip* chip, Bit32u data ) { 3.644 + Bit32u change = chanData ^ data; 3.645 + chanData = data; 3.646 + Op( 0 )->chanData = data; 3.647 + Op( 1 )->chanData = data; 3.648 + //Since a frequency update triggered this, always update frequency 3.649 + Op( 0 )->UpdateFrequency(); 3.650 + Op( 1 )->UpdateFrequency(); 3.651 + if ( change & ( 0xff << SHIFT_KSLBASE ) ) { 3.652 + Op( 0 )->UpdateAttenuation(); 3.653 + Op( 1 )->UpdateAttenuation(); 3.654 + } 3.655 + if ( change & ( 0xff << SHIFT_KEYCODE ) ) { 3.656 + Op( 0 )->UpdateRates( chip ); 3.657 + Op( 1 )->UpdateRates( chip ); 3.658 + } 3.659 +} 3.660 + 3.661 +void Channel::UpdateFrequency( const Chip* chip, Bit8u fourOp ) { 3.662 + //Extrace the frequency bits 3.663 + Bit32u data = chanData & 0xffff; 3.664 + Bit32u kslBase = KslTable[ data >> 6 ]; 3.665 + Bit32u keyCode = ( data & 0x1c00) >> 9; 3.666 + if ( chip->reg08 & 0x40 ) { 3.667 + keyCode |= ( data & 0x100)>>8; /* notesel == 1 */ 3.668 + } else { 3.669 + keyCode |= ( data & 0x200)>>9; /* notesel == 0 */ 3.670 + } 3.671 + //Add the keycode and ksl into the highest bits of chanData 3.672 + data |= (keyCode << SHIFT_KEYCODE) | ( kslBase << SHIFT_KSLBASE ); 3.673 + ( this + 0 )->SetChanData( chip, data ); 3.674 + if ( fourOp & 0x3f ) { 3.675 + ( this + 1 )->SetChanData( chip, data ); 3.676 + } 3.677 +} 3.678 + 3.679 +void Channel::WriteA0( const Chip* chip, Bit8u val ) { 3.680 + Bit8u fourOp = chip->reg104 & chip->opl3Active & fourMask; 3.681 + //Don't handle writes to silent fourop channels 3.682 + if ( fourOp > 0x80 ) 3.683 + return; 3.684 + Bit32u change = (chanData ^ val ) & 0xff; 3.685 + if ( change ) { 3.686 + chanData ^= change; 3.687 + UpdateFrequency( chip, fourOp ); 3.688 + } 3.689 +} 3.690 + 3.691 +void Channel::WriteB0( const Chip* chip, Bit8u val ) { 3.692 + Bit8u fourOp = chip->reg104 & chip->opl3Active & fourMask; 3.693 + //Don't handle writes to silent fourop channels 3.694 + if ( fourOp > 0x80 ) 3.695 + return; 3.696 + Bitu change = (chanData ^ ( val << 8 ) ) & 0x1f00; 3.697 + if ( change ) { 3.698 + chanData ^= change; 3.699 + UpdateFrequency( chip, fourOp ); 3.700 + } 3.701 + //Check for a change in the keyon/off state 3.702 + if ( !(( val ^ regB0) & 0x20)) 3.703 + return; 3.704 + regB0 = val; 3.705 + if ( val & 0x20 ) { 3.706 + Op(0)->KeyOn( 0x1 ); 3.707 + Op(1)->KeyOn( 0x1 ); 3.708 + if ( fourOp & 0x3f ) { 3.709 + ( this + 1 )->Op(0)->KeyOn( 1 ); 3.710 + ( this + 1 )->Op(1)->KeyOn( 1 ); 3.711 + } 3.712 + } else { 3.713 + Op(0)->KeyOff( 0x1 ); 3.714 + Op(1)->KeyOff( 0x1 ); 3.715 + if ( fourOp & 0x3f ) { 3.716 + ( this + 1 )->Op(0)->KeyOff( 1 ); 3.717 + ( this + 1 )->Op(1)->KeyOff( 1 ); 3.718 + } 3.719 + } 3.720 +} 3.721 + 3.722 +void Channel::WriteC0( const Chip* chip, Bit8u val ) { 3.723 + Bit8u change = val ^ regC0; 3.724 + if ( !change ) 3.725 + return; 3.726 + regC0 = val; 3.727 + feedback = ( val >> 1 ) & 7; 3.728 + if ( feedback ) { 3.729 + //We shift the input to the right 10 bit wave index value 3.730 + feedback = 9 - feedback; 3.731 + } else { 3.732 + feedback = 31; 3.733 + } 3.734 + //Select the new synth mode 3.735 + if ( chip->opl3Active ) { 3.736 + //4-op mode enabled for this channel 3.737 + if ( (chip->reg104 & fourMask) & 0x3f ) { 3.738 + Channel* chan0, *chan1; 3.739 + //Check if it's the 2nd channel in a 4-op 3.740 + if ( !(fourMask & 0x80 ) ) { 3.741 + chan0 = this; 3.742 + chan1 = this + 1; 3.743 + } else { 3.744 + chan0 = this - 1; 3.745 + chan1 = this; 3.746 + } 3.747 + 3.748 + Bit8u synth = ( (chan0->regC0 & 1) << 0 )| (( chan1->regC0 & 1) << 1 ); 3.749 + switch ( synth ) { 3.750 + case 0: 3.751 + chan0->synthHandler = &Channel::BlockTemplate< sm3FMFM >; 3.752 + break; 3.753 + case 1: 3.754 + chan0->synthHandler = &Channel::BlockTemplate< sm3AMFM >; 3.755 + break; 3.756 + case 2: 3.757 + chan0->synthHandler = &Channel::BlockTemplate< sm3FMAM >; 3.758 + break; 3.759 + case 3: 3.760 + chan0->synthHandler = &Channel::BlockTemplate< sm3AMAM >; 3.761 + break; 3.762 + } 3.763 + //Disable updating percussion channels 3.764 + } else if ((fourMask & 0x40) && ( chip->regBD & 0x20) ) { 3.765 + 3.766 + //Regular dual op, am or fm 3.767 + } else if ( val & 1 ) { 3.768 + synthHandler = &Channel::BlockTemplate< sm3AM >; 3.769 + } else { 3.770 + synthHandler = &Channel::BlockTemplate< sm3FM >; 3.771 + } 3.772 + maskLeft = ( val & 0x10 ) ? -1 : 0; 3.773 + maskRight = ( val & 0x20 ) ? -1 : 0; 3.774 + //opl2 active 3.775 + } else { 3.776 + //Disable updating percussion channels 3.777 + if ( (fourMask & 0x40) && ( chip->regBD & 0x20 ) ) { 3.778 + 3.779 + //Regular dual op, am or fm 3.780 + } else if ( val & 1 ) { 3.781 + synthHandler = &Channel::BlockTemplate< sm2AM >; 3.782 + } else { 3.783 + synthHandler = &Channel::BlockTemplate< sm2FM >; 3.784 + } 3.785 + } 3.786 +} 3.787 + 3.788 +void Channel::ResetC0( const Chip* chip ) { 3.789 + Bit8u val = regC0; 3.790 + regC0 ^= 0xff; 3.791 + WriteC0( chip, val ); 3.792 +}; 3.793 + 3.794 +template< bool opl3Mode> 3.795 +INLINE void Channel::GeneratePercussion( Chip* chip, Bit32s* output ) { 3.796 + Channel* chan = this; 3.797 + 3.798 + //BassDrum 3.799 + Bit32s mod = (Bit32u)((old[0] + old[1])) >> feedback; 3.800 + old[0] = old[1]; 3.801 + old[1] = Op(0)->GetSample( mod ); 3.802 + 3.803 + //When bassdrum is in AM mode first operator is ignoed 3.804 + if ( chan->regC0 & 1 ) { 3.805 + mod = 0; 3.806 + } else { 3.807 + mod = old[0]; 3.808 + } 3.809 + Bit32s sample = Op(1)->GetSample( mod ); 3.810 + 3.811 + 3.812 + //Precalculate stuff used by other outputs 3.813 + Bit32u noiseBit = chip->ForwardNoise() & 0x1; 3.814 + Bit32u c2 = Op(2)->ForwardWave(); 3.815 + Bit32u c5 = Op(5)->ForwardWave(); 3.816 + Bit32u phaseBit = (((c2 & 0x88) ^ ((c2<<5) & 0x80)) | ((c5 ^ (c5<<2)) & 0x20)) ? 0x02 : 0x00; 3.817 + 3.818 + //Hi-Hat 3.819 + Bit32u hhVol = Op(2)->ForwardVolume(); 3.820 + if ( !ENV_SILENT( hhVol ) ) { 3.821 + Bit32u hhIndex = (phaseBit<<8) | (0x34 << ( phaseBit ^ (noiseBit << 1 ))); 3.822 + sample += Op(2)->GetWave( hhIndex, hhVol ); 3.823 + } 3.824 + //Snare Drum 3.825 + Bit32u sdVol = Op(3)->ForwardVolume(); 3.826 + if ( !ENV_SILENT( sdVol ) ) { 3.827 + Bit32u sdIndex = ( 0x100 + (c2 & 0x100) ) ^ ( noiseBit << 8 ); 3.828 + sample += Op(3)->GetWave( sdIndex, sdVol ); 3.829 + } 3.830 + //Tom-tom 3.831 + sample += Op(4)->GetSample( 0 ); 3.832 + 3.833 + //Top-Cymbal 3.834 + Bit32u tcVol = Op(5)->ForwardVolume(); 3.835 + if ( !ENV_SILENT( tcVol ) ) { 3.836 + Bit32u tcIndex = (1 + phaseBit) << 8; 3.837 + sample += Op(5)->GetWave( tcIndex, tcVol ); 3.838 + } 3.839 + sample <<= 1; 3.840 + if ( opl3Mode ) { 3.841 + output[0] += sample; 3.842 + output[1] += sample; 3.843 + } else { 3.844 + output[0] += sample; 3.845 + } 3.846 +} 3.847 + 3.848 +template<SynthMode mode> 3.849 +Channel* Channel::BlockTemplate( Chip* chip, Bit32u samples, Bit32s* output ) { 3.850 + switch( mode ) { 3.851 + case sm2AM: 3.852 + case sm3AM: 3.853 + if ( Op(0)->Silent() && Op(1)->Silent() ) { 3.854 + old[0] = old[1] = 0; 3.855 + return (this + 1); 3.856 + } 3.857 + break; 3.858 + case sm2FM: 3.859 + case sm3FM: 3.860 + if ( Op(1)->Silent() ) { 3.861 + old[0] = old[1] = 0; 3.862 + return (this + 1); 3.863 + } 3.864 + break; 3.865 + case sm3FMFM: 3.866 + if ( Op(3)->Silent() ) { 3.867 + old[0] = old[1] = 0; 3.868 + return (this + 2); 3.869 + } 3.870 + break; 3.871 + case sm3AMFM: 3.872 + if ( Op(0)->Silent() && Op(3)->Silent() ) { 3.873 + old[0] = old[1] = 0; 3.874 + return (this + 2); 3.875 + } 3.876 + break; 3.877 + case sm3FMAM: 3.878 + if ( Op(1)->Silent() && Op(3)->Silent() ) { 3.879 + old[0] = old[1] = 0; 3.880 + return (this + 2); 3.881 + } 3.882 + break; 3.883 + case sm3AMAM: 3.884 + if ( Op(0)->Silent() && Op(2)->Silent() && Op(3)->Silent() ) { 3.885 + old[0] = old[1] = 0; 3.886 + return (this + 2); 3.887 + } 3.888 + break; 3.889 + } 3.890 + //Init the operators with the the current vibrato and tremolo values 3.891 + Op( 0 )->Prepare( chip ); 3.892 + Op( 1 )->Prepare( chip ); 3.893 + if ( mode > sm4Start ) { 3.894 + Op( 2 )->Prepare( chip ); 3.895 + Op( 3 )->Prepare( chip ); 3.896 + } 3.897 + if ( mode > sm6Start ) { 3.898 + Op( 4 )->Prepare( chip ); 3.899 + Op( 5 )->Prepare( chip ); 3.900 + } 3.901 + for ( Bitu i = 0; i < samples; i++ ) { 3.902 + //Early out for percussion handlers 3.903 + if ( mode == sm2Percussion ) { 3.904 + GeneratePercussion<false>( chip, output + i ); 3.905 + continue; //Prevent some unitialized value bitching 3.906 + } else if ( mode == sm3Percussion ) { 3.907 + GeneratePercussion<true>( chip, output + i * 2 ); 3.908 + continue; //Prevent some unitialized value bitching 3.909 + } 3.910 + 3.911 + //Do unsigned shift so we can shift out all bits but still stay in 10 bit range otherwise 3.912 + Bit32s mod = (Bit32u)((old[0] + old[1])) >> feedback; 3.913 + old[0] = old[1]; 3.914 + old[1] = Op(0)->GetSample( mod ); 3.915 + Bit32s sample; 3.916 + Bit32s out0 = old[0]; 3.917 + if ( mode == sm2AM || mode == sm3AM ) { 3.918 + sample = out0 + Op(1)->GetSample( 0 ); 3.919 + } else if ( mode == sm2FM || mode == sm3FM ) { 3.920 + sample = Op(1)->GetSample( out0 ); 3.921 + } else if ( mode == sm3FMFM ) { 3.922 + Bits next = Op(1)->GetSample( out0 ); 3.923 + next = Op(2)->GetSample( next ); 3.924 + sample = Op(3)->GetSample( next ); 3.925 + } else if ( mode == sm3AMFM ) { 3.926 + sample = out0; 3.927 + Bits next = Op(1)->GetSample( 0 ); 3.928 + next = Op(2)->GetSample( next ); 3.929 + sample += Op(3)->GetSample( next ); 3.930 + } else if ( mode == sm3FMAM ) { 3.931 + sample = Op(1)->GetSample( out0 ); 3.932 + Bits next = Op(2)->GetSample( 0 ); 3.933 + sample += Op(3)->GetSample( next ); 3.934 + } else if ( mode == sm3AMAM ) { 3.935 + sample = out0; 3.936 + Bits next = Op(1)->GetSample( 0 ); 3.937 + sample += Op(2)->GetSample( next ); 3.938 + sample += Op(3)->GetSample( 0 ); 3.939 + } 3.940 + switch( mode ) { 3.941 + case sm2AM: 3.942 + case sm2FM: 3.943 + if (chip->is_opl3) 3.944 + { 3.945 + output[ i * 2 + 0 ] += sample; 3.946 + output[ i * 2 + 1 ] += sample; 3.947 + } 3.948 + else 3.949 + output[ i ] += sample; 3.950 + break; 3.951 + case sm3AM: 3.952 + case sm3FM: 3.953 + case sm3FMFM: 3.954 + case sm3AMFM: 3.955 + case sm3FMAM: 3.956 + case sm3AMAM: 3.957 + output[ i * 2 + 0 ] += sample & maskLeft; 3.958 + output[ i * 2 + 1 ] += sample & maskRight; 3.959 + break; 3.960 + } 3.961 + } 3.962 + switch( mode ) { 3.963 + case sm2AM: 3.964 + case sm2FM: 3.965 + case sm3AM: 3.966 + case sm3FM: 3.967 + return ( this + 1 ); 3.968 + case sm3FMFM: 3.969 + case sm3AMFM: 3.970 + case sm3FMAM: 3.971 + case sm3AMAM: 3.972 + return( this + 2 ); 3.973 + case sm2Percussion: 3.974 + case sm3Percussion: 3.975 + return( this + 3 ); 3.976 + } 3.977 + return 0; 3.978 +} 3.979 + 3.980 +/* 3.981 + Chip 3.982 +*/ 3.983 + 3.984 +Chip::Chip() { 3.985 + reg08 = 0; 3.986 + reg04 = 0; 3.987 + regBD = 0; 3.988 + reg104 = 0; 3.989 + opl3Active = 0; 3.990 +} 3.991 + 3.992 +INLINE Bit32u Chip::ForwardNoise() { 3.993 + noiseCounter += noiseAdd; 3.994 + Bitu count = noiseCounter >> LFO_SH; 3.995 + noiseCounter &= WAVE_MASK; 3.996 + for ( ; count > 0; --count ) { 3.997 + //Noise calculation from mame 3.998 + noiseValue ^= ( 0x800302 ) & ( 0 - (noiseValue & 1 ) ); 3.999 + noiseValue >>= 1; 3.1000 + } 3.1001 + return noiseValue; 3.1002 +} 3.1003 + 3.1004 +INLINE Bit32u Chip::ForwardLFO( Bit32u samples ) { 3.1005 + //Current vibrato value, runs 4x slower than tremolo 3.1006 + vibratoSign = ( VibratoTable[ vibratoIndex >> 2] ) >> 7; 3.1007 + vibratoShift = ( VibratoTable[ vibratoIndex >> 2] & 7) + vibratoStrength; 3.1008 + tremoloValue = TremoloTable[ tremoloIndex ] >> tremoloStrength; 3.1009 + 3.1010 + //Check hom many samples there can be done before the value changes 3.1011 + Bit32u todo = LFO_MAX - lfoCounter; 3.1012 + Bit32u count = (todo + lfoAdd - 1) / lfoAdd; 3.1013 + if ( count > samples ) { 3.1014 + count = samples; 3.1015 + lfoCounter += count * lfoAdd; 3.1016 + } else { 3.1017 + lfoCounter += count * lfoAdd; 3.1018 + lfoCounter &= (LFO_MAX - 1); 3.1019 + //Maximum of 7 vibrato value * 4 3.1020 + vibratoIndex = ( vibratoIndex + 1 ) & 31; 3.1021 + //Clip tremolo to the the table size 3.1022 + if ( tremoloIndex + 1 < TREMOLO_TABLE ) 3.1023 + ++tremoloIndex; 3.1024 + else 3.1025 + tremoloIndex = 0; 3.1026 + } 3.1027 + return count; 3.1028 +} 3.1029 + 3.1030 + 3.1031 +void Chip::WriteBD( Bit8u val ) { 3.1032 + Bit8u change = regBD ^ val; 3.1033 + if ( !change ) 3.1034 + return; 3.1035 + regBD = val; 3.1036 + //TODO could do this with shift and xor? 3.1037 + vibratoStrength = (val & 0x40) ? 0x00 : 0x01; 3.1038 + tremoloStrength = (val & 0x80) ? 0x00 : 0x02; 3.1039 + if ( val & 0x20 ) { 3.1040 + //Drum was just enabled, make sure channel 6 has the right synth 3.1041 + if ( change & 0x20 ) { 3.1042 + if ( opl3Active ) { 3.1043 + chan[6].synthHandler = &Channel::BlockTemplate< sm3Percussion >; 3.1044 + } else { 3.1045 + chan[6].synthHandler = &Channel::BlockTemplate< sm2Percussion >; 3.1046 + } 3.1047 + } 3.1048 + //Bass Drum 3.1049 + if ( val & 0x10 ) { 3.1050 + chan[6].op[0].KeyOn( 0x2 ); 3.1051 + chan[6].op[1].KeyOn( 0x2 ); 3.1052 + } else { 3.1053 + chan[6].op[0].KeyOff( 0x2 ); 3.1054 + chan[6].op[1].KeyOff( 0x2 ); 3.1055 + } 3.1056 + //Hi-Hat 3.1057 + if ( val & 0x1 ) { 3.1058 + chan[7].op[0].KeyOn( 0x2 ); 3.1059 + } else { 3.1060 + chan[7].op[0].KeyOff( 0x2 ); 3.1061 + } 3.1062 + //Snare 3.1063 + if ( val & 0x8 ) { 3.1064 + chan[7].op[1].KeyOn( 0x2 ); 3.1065 + } else { 3.1066 + chan[7].op[1].KeyOff( 0x2 ); 3.1067 + } 3.1068 + //Tom-Tom 3.1069 + if ( val & 0x4 ) { 3.1070 + chan[8].op[0].KeyOn( 0x2 ); 3.1071 + } else { 3.1072 + chan[8].op[0].KeyOff( 0x2 ); 3.1073 + } 3.1074 + //Top Cymbal 3.1075 + if ( val & 0x2 ) { 3.1076 + chan[8].op[1].KeyOn( 0x2 ); 3.1077 + } else { 3.1078 + chan[8].op[1].KeyOff( 0x2 ); 3.1079 + } 3.1080 + //Toggle keyoffs when we turn off the percussion 3.1081 + } else if ( change & 0x20 ) { 3.1082 + //Trigger a reset to setup the original synth handler 3.1083 + chan[6].ResetC0( this ); 3.1084 + chan[6].op[0].KeyOff( 0x2 ); 3.1085 + chan[6].op[1].KeyOff( 0x2 ); 3.1086 + chan[7].op[0].KeyOff( 0x2 ); 3.1087 + chan[7].op[1].KeyOff( 0x2 ); 3.1088 + chan[8].op[0].KeyOff( 0x2 ); 3.1089 + chan[8].op[1].KeyOff( 0x2 ); 3.1090 + } 3.1091 +} 3.1092 + 3.1093 + 3.1094 +#define REGOP( _FUNC_ ) \ 3.1095 + index = ( ( reg >> 3) & 0x20 ) | ( reg & 0x1f ); \ 3.1096 + if ( OpOffsetTable[ index ] ) { \ 3.1097 + Operator* regOp = (Operator*)( ((char *)this ) + OpOffsetTable[ index ] ); \ 3.1098 + regOp->_FUNC_( this, val ); \ 3.1099 + } 3.1100 + 3.1101 +#define REGCHAN( _FUNC_ ) \ 3.1102 + index = ( ( reg >> 4) & 0x10 ) | ( reg & 0xf ); \ 3.1103 + if ( ChanOffsetTable[ index ] ) { \ 3.1104 + Channel* regChan = (Channel*)( ((char *)this ) + ChanOffsetTable[ index ] ); \ 3.1105 + regChan->_FUNC_( this, val ); \ 3.1106 + } 3.1107 + 3.1108 +void Chip::WriteReg( Bit32u reg, Bit8u val ) { 3.1109 + Bitu index; 3.1110 + switch ( (reg & 0xf0) >> 4 ) { 3.1111 + case 0x00 >> 4: 3.1112 + if ( reg == 0x01 ) { 3.1113 + waveFormMask = ( val & 0x20 ) ? 0x7 : 0x0; 3.1114 + } else if ( reg == 0x104 ) { 3.1115 + //Only detect changes in lowest 6 bits 3.1116 + if ( !((reg104 ^ val) & 0x3f) ) 3.1117 + return; 3.1118 + //Always keep the highest bit enabled, for checking > 0x80 3.1119 + reg104 = 0x80 | ( val & 0x3f ); 3.1120 + } else if ( reg == 0x105 ) { 3.1121 + //MAME says the real opl3 doesn't reset anything on opl3 disable/enable till the next write in another register 3.1122 + if ( !((opl3Active ^ val) & 1 ) ) 3.1123 + return; 3.1124 + opl3Active = ( val & 1 ) ? 0xff : 0; 3.1125 + //Update the 0xc0 register for all channels to signal the switch to mono/stereo handlers 3.1126 + for ( int i = 0; i < 18;i++ ) { 3.1127 + chan[i].ResetC0( this ); 3.1128 + } 3.1129 + } else if ( reg == 0x08 ) { 3.1130 + reg08 = val; 3.1131 + } 3.1132 + case 0x10 >> 4: 3.1133 + break; 3.1134 + case 0x20 >> 4: 3.1135 + case 0x30 >> 4: 3.1136 + REGOP( Write20 ); 3.1137 + break; 3.1138 + case 0x40 >> 4: 3.1139 + case 0x50 >> 4: 3.1140 + REGOP( Write40 ); 3.1141 + break; 3.1142 + case 0x60 >> 4: 3.1143 + case 0x70 >> 4: 3.1144 + REGOP( Write60 ); 3.1145 + break; 3.1146 + case 0x80 >> 4: 3.1147 + case 0x90 >> 4: 3.1148 + REGOP( Write80 ); 3.1149 + break; 3.1150 + case 0xa0 >> 4: 3.1151 + REGCHAN( WriteA0 ); 3.1152 + break; 3.1153 + case 0xb0 >> 4: 3.1154 + if ( reg == 0xbd ) { 3.1155 + WriteBD( val ); 3.1156 + } else { 3.1157 + REGCHAN( WriteB0 ); 3.1158 + } 3.1159 + break; 3.1160 + case 0xc0 >> 4: 3.1161 + REGCHAN( WriteC0 ); 3.1162 + case 0xd0 >> 4: 3.1163 + break; 3.1164 + case 0xe0 >> 4: 3.1165 + case 0xf0 >> 4: 3.1166 + REGOP( WriteE0 ); 3.1167 + break; 3.1168 + } 3.1169 +} 3.1170 + 3.1171 + 3.1172 +Bit32u Chip::WriteAddr( Bit32u port, Bit8u val ) { 3.1173 + switch ( port & 3 ) { 3.1174 + case 0: 3.1175 + return val; 3.1176 + case 2: 3.1177 + if ( opl3Active || (val == 0x05) ) 3.1178 + return 0x100 | val; 3.1179 + else 3.1180 + return val; 3.1181 + } 3.1182 + return 0; 3.1183 +} 3.1184 + 3.1185 +void Chip::GenerateBlock2( Bitu total, Bit32s* output ) { 3.1186 + while ( total > 0 ) { 3.1187 + Bit32u samples = ForwardLFO( total ); 3.1188 + memset(output, 0, sizeof(Bit32s) * samples); 3.1189 + int count = 0; 3.1190 + for( Channel* ch = chan; ch < chan + 9; ) { 3.1191 + count++; 3.1192 + ch = (ch->*(ch->synthHandler))( this, samples, output ); 3.1193 + } 3.1194 + total -= samples; 3.1195 + output += samples; 3.1196 + } 3.1197 +} 3.1198 + 3.1199 +void Chip::GenerateBlock3( Bitu total, Bit32s* output ) { 3.1200 + while ( total > 0 ) { 3.1201 + Bit32u samples = ForwardLFO( total ); 3.1202 + memset(output, 0, sizeof(Bit32s) * samples *2); 3.1203 + int count = 0; 3.1204 + for( Channel* ch = chan; ch < chan + 18; ) { 3.1205 + count++; 3.1206 + ch = (ch->*(ch->synthHandler))( this, samples, output ); 3.1207 + } 3.1208 + total -= samples; 3.1209 + output += samples * 2; 3.1210 + } 3.1211 +} 3.1212 + 3.1213 +void Chip::Setup( Bit32u rate, int chip_is_opl3 ) { 3.1214 + double original = OPLRATE; 3.1215 +// double original = rate; 3.1216 + double scale = original / (double)rate; 3.1217 + 3.1218 + is_opl3 = chip_is_opl3; 3.1219 + 3.1220 + //Noise counter is run at the same precision as general waves 3.1221 + noiseAdd = (Bit32u)( 0.5 + scale * ( 1 << LFO_SH ) ); 3.1222 + noiseCounter = 0; 3.1223 + noiseValue = 1; //Make sure it triggers the noise xor the first time 3.1224 + //The low frequency oscillation counter 3.1225 + //Every time his overflows vibrato and tremoloindex are increased 3.1226 + lfoAdd = (Bit32u)( 0.5 + scale * ( 1 << LFO_SH ) ); 3.1227 + lfoCounter = 0; 3.1228 + vibratoIndex = 0; 3.1229 + tremoloIndex = 0; 3.1230 + 3.1231 + //With higher octave this gets shifted up 3.1232 + //-1 since the freqCreateTable = *2 3.1233 +#ifdef WAVE_PRECISION 3.1234 + double freqScale = ( 1 << 7 ) * scale * ( 1 << ( WAVE_SH - 1 - 10)); 3.1235 + for ( int i = 0; i < 16; i++ ) { 3.1236 + freqMul[i] = (Bit32u)( 0.5 + freqScale * FreqCreateTable[ i ] ); 3.1237 + } 3.1238 +#else 3.1239 + Bit32u freqScale = (Bit32u)( 0.5 + scale * ( 1 << ( WAVE_SH - 1 - 10))); 3.1240 + for ( int i = 0; i < 16; i++ ) { 3.1241 + freqMul[i] = freqScale * FreqCreateTable[ i ]; 3.1242 + } 3.1243 +#endif 3.1244 + 3.1245 + //-3 since the real envelope takes 8 steps to reach the single value we supply 3.1246 + for ( Bit8u i = 0; i < 76; i++ ) { 3.1247 + Bit8u index, shift; 3.1248 + EnvelopeSelect( i, index, shift ); 3.1249 + linearRates[i] = (Bit32u)( scale * (EnvelopeIncreaseTable[ index ] << ( RATE_SH + ENV_EXTRA - shift - 3 ))); 3.1250 + } 3.1251 + //Generate the best matching attack rate 3.1252 + for ( Bit8u i = 0; i < 62; i++ ) { 3.1253 + Bit8u index, shift; 3.1254 + EnvelopeSelect( i, index, shift ); 3.1255 + //Original amount of samples the attack would take 3.1256 + Bit32s original = (Bit32u)( (AttackSamplesTable[ index ] << shift) / scale); 3.1257 + 3.1258 + Bit32s guessAdd = (Bit32u)( scale * (EnvelopeIncreaseTable[ index ] << ( RATE_SH - shift - 3 ))); 3.1259 + Bit32s bestAdd = guessAdd; 3.1260 + Bit32u bestDiff = 1 << 30; 3.1261 + for( Bit32u passes = 0; passes < 16; passes ++ ) { 3.1262 + Bit32s volume = ENV_MAX; 3.1263 + Bit32s samples = 0; 3.1264 + Bit32u count = 0; 3.1265 + while ( volume > 0 && samples < original * 2 ) { 3.1266 + count += guessAdd; 3.1267 + Bit32s change = count >> RATE_SH; 3.1268 + count &= RATE_MASK; 3.1269 + if ( GCC_UNLIKELY(change) ) { // less than 1 % 3.1270 + volume += ( ~volume * change ) >> 3; 3.1271 + } 3.1272 + samples++; 3.1273 + 3.1274 + } 3.1275 + Bit32s diff = original - samples; 3.1276 + Bit32u lDiff = labs( diff ); 3.1277 + //Init last on first pass 3.1278 + if ( lDiff < bestDiff ) { 3.1279 + bestDiff = lDiff; 3.1280 + bestAdd = guessAdd; 3.1281 + if ( !bestDiff ) 3.1282 + break; 3.1283 + } 3.1284 + //Below our target 3.1285 + if ( diff < 0 ) { 3.1286 + //Better than the last time 3.1287 + Bit32s mul = ((original - diff) << 12) / original; 3.1288 + guessAdd = ((guessAdd * mul) >> 12); 3.1289 + guessAdd++; 3.1290 + } else if ( diff > 0 ) { 3.1291 + Bit32s mul = ((original - diff) << 12) / original; 3.1292 + guessAdd = (guessAdd * mul) >> 12; 3.1293 + guessAdd--; 3.1294 + } 3.1295 + } 3.1296 + attackRates[i] = bestAdd; 3.1297 + } 3.1298 + for ( Bit8u i = 62; i < 76; i++ ) { 3.1299 + //This should provide instant volume maximizing 3.1300 + attackRates[i] = 8 << RATE_SH; 3.1301 + } 3.1302 + //Setup the channels with the correct four op flags 3.1303 + //Channels are accessed through a table so they appear linear here 3.1304 + chan[ 0].fourMask = 0x00 | ( 1 << 0 ); 3.1305 + chan[ 1].fourMask = 0x80 | ( 1 << 0 ); 3.1306 + chan[ 2].fourMask = 0x00 | ( 1 << 1 ); 3.1307 + chan[ 3].fourMask = 0x80 | ( 1 << 1 ); 3.1308 + chan[ 4].fourMask = 0x00 | ( 1 << 2 ); 3.1309 + chan[ 5].fourMask = 0x80 | ( 1 << 2 ); 3.1310 + 3.1311 + chan[ 9].fourMask = 0x00 | ( 1 << 3 ); 3.1312 + chan[10].fourMask = 0x80 | ( 1 << 3 ); 3.1313 + chan[11].fourMask = 0x00 | ( 1 << 4 ); 3.1314 + chan[12].fourMask = 0x80 | ( 1 << 4 ); 3.1315 + chan[13].fourMask = 0x00 | ( 1 << 5 ); 3.1316 + chan[14].fourMask = 0x80 | ( 1 << 5 ); 3.1317 + 3.1318 + //mark the percussion channels 3.1319 + chan[ 6].fourMask = 0x40; 3.1320 + chan[ 7].fourMask = 0x40; 3.1321 + chan[ 8].fourMask = 0x40; 3.1322 + 3.1323 + //Clear Everything in opl3 mode 3.1324 + WriteReg( 0x105, 0x1 ); 3.1325 + for ( int i = 0; i < 512; i++ ) { 3.1326 + if ( i == 0x105 ) 3.1327 + continue; 3.1328 + WriteReg( i, 0xff ); 3.1329 + WriteReg( i, 0x0 ); 3.1330 + } 3.1331 + WriteReg( 0x105, 0x0 ); 3.1332 + //Clear everything in opl2 mode 3.1333 + for ( int i = 0; i < 255; i++ ) { 3.1334 + WriteReg( i, 0xff ); 3.1335 + WriteReg( i, 0x0 ); 3.1336 + } 3.1337 +} 3.1338 + 3.1339 +static bool doneTables = false; 3.1340 +void InitTables( void ) { 3.1341 + if ( doneTables ) 3.1342 + return; 3.1343 + doneTables = true; 3.1344 +#if ( DBOPL_WAVE == WAVE_HANDLER ) || ( DBOPL_WAVE == WAVE_TABLELOG ) 3.1345 + //Exponential volume table, same as the real adlib 3.1346 + for ( int i = 0; i < 256; i++ ) { 3.1347 + //Save them in reverse 3.1348 + ExpTable[i] = (int)( 0.5 + ( pow(2.0, ( 255 - i) * ( 1.0 /256 ) )-1) * 1024 ); 3.1349 + ExpTable[i] += 1024; //or remove the -1 oh well :) 3.1350 + //Preshift to the left once so the final volume can shift to the right 3.1351 + ExpTable[i] *= 2; 3.1352 + } 3.1353 +#endif 3.1354 +#if ( DBOPL_WAVE == WAVE_HANDLER ) 3.1355 + //Add 0.5 for the trunc rounding of the integer cast 3.1356 + //Do a PI sinetable instead of the original 0.5 PI 3.1357 + for ( int i = 0; i < 512; i++ ) { 3.1358 + SinTable[i] = (Bit16s)( 0.5 - log10( sin( (i + 0.5) * (PI / 512.0) ) ) / log10(2.0)*256 ); 3.1359 + } 3.1360 +#endif 3.1361 +#if ( DBOPL_WAVE == WAVE_TABLEMUL ) 3.1362 + //Multiplication based tables 3.1363 + for ( int i = 0; i < 384; i++ ) { 3.1364 + int s = i * 8; 3.1365 + //TODO maybe keep some of the precision errors of the original table? 3.1366 + double val = ( 0.5 + ( pow(2.0, -1.0 + ( 255 - s) * ( 1.0 /256 ) )) * ( 1 << MUL_SH )); 3.1367 + MulTable[i] = (Bit16u)(val); 3.1368 + } 3.1369 + 3.1370 + //Sine Wave Base 3.1371 + for ( int i = 0; i < 512; i++ ) { 3.1372 + WaveTable[ 0x0200 + i ] = (Bit16s)(sin( (i + 0.5) * (PI / 512.0) ) * 4084); 3.1373 + WaveTable[ 0x0000 + i ] = -WaveTable[ 0x200 + i ]; 3.1374 + } 3.1375 + //Exponential wave 3.1376 + for ( int i = 0; i < 256; i++ ) { 3.1377 + WaveTable[ 0x700 + i ] = (Bit16s)( 0.5 + ( pow(2.0, -1.0 + ( 255 - i * 8) * ( 1.0 /256 ) ) ) * 4085 ); 3.1378 + WaveTable[ 0x6ff - i ] = -WaveTable[ 0x700 + i ]; 3.1379 + } 3.1380 +#endif 3.1381 +#if ( DBOPL_WAVE == WAVE_TABLELOG ) 3.1382 + //Sine Wave Base 3.1383 + for ( int i = 0; i < 512; i++ ) { 3.1384 + WaveTable[ 0x0200 + i ] = (Bit16s)( 0.5 - log10( sin( (i + 0.5) * (PI / 512.0) ) ) / log10(2.0)*256 ); 3.1385 + WaveTable[ 0x0000 + i ] = ((Bit16s)0x8000) | WaveTable[ 0x200 + i]; 3.1386 + } 3.1387 + //Exponential wave 3.1388 + for ( int i = 0; i < 256; i++ ) { 3.1389 + WaveTable[ 0x700 + i ] = i * 8; 3.1390 + WaveTable[ 0x6ff - i ] = ((Bit16s)0x8000) | i * 8; 3.1391 + } 3.1392 +#endif 3.1393 + 3.1394 + // | |//\\|____|WAV7|//__|/\ |____|/\/\| 3.1395 + // |\\//| | |WAV7| | \/| | | 3.1396 + // |06 |0126|27 |7 |3 |4 |4 5 |5 | 3.1397 + 3.1398 +#if (( DBOPL_WAVE == WAVE_TABLELOG ) || ( DBOPL_WAVE == WAVE_TABLEMUL )) 3.1399 + for ( int i = 0; i < 256; i++ ) { 3.1400 + //Fill silence gaps 3.1401 + WaveTable[ 0x400 + i ] = WaveTable[0]; 3.1402 + WaveTable[ 0x500 + i ] = WaveTable[0]; 3.1403 + WaveTable[ 0x900 + i ] = WaveTable[0]; 3.1404 + WaveTable[ 0xc00 + i ] = WaveTable[0]; 3.1405 + WaveTable[ 0xd00 + i ] = WaveTable[0]; 3.1406 + //Replicate sines in other pieces 3.1407 + WaveTable[ 0x800 + i ] = WaveTable[ 0x200 + i ]; 3.1408 + //double speed sines 3.1409 + WaveTable[ 0xa00 + i ] = WaveTable[ 0x200 + i * 2 ]; 3.1410 + WaveTable[ 0xb00 + i ] = WaveTable[ 0x000 + i * 2 ]; 3.1411 + WaveTable[ 0xe00 + i ] = WaveTable[ 0x200 + i * 2 ]; 3.1412 + WaveTable[ 0xf00 + i ] = WaveTable[ 0x200 + i * 2 ]; 3.1413 + } 3.1414 +#endif 3.1415 + 3.1416 + //Create the ksl table 3.1417 + for ( int oct = 0; oct < 8; oct++ ) { 3.1418 + int base = oct * 8; 3.1419 + for ( int i = 0; i < 16; i++ ) { 3.1420 + int val = base - KslCreateTable[i]; 3.1421 + if ( val < 0 ) 3.1422 + val = 0; 3.1423 + //*4 for the final range to match attenuation range 3.1424 + KslTable[ oct * 16 + i ] = val * 4; 3.1425 + } 3.1426 + } 3.1427 + //Create the Tremolo table, just increase and decrease a triangle wave 3.1428 + for ( Bit8u i = 0; i < TREMOLO_TABLE / 2; i++ ) { 3.1429 + Bit8u val = i << ENV_EXTRA; 3.1430 + TremoloTable[i] = val; 3.1431 + TremoloTable[TREMOLO_TABLE - 1 - i] = val; 3.1432 + } 3.1433 + //Create a table with offsets of the channels from the start of the chip 3.1434 + DBOPL::Chip* chip = 0; 3.1435 + for ( Bitu i = 0; i < 32; i++ ) { 3.1436 + Bitu index = i & 0xf; 3.1437 + if ( index >= 9 ) { 3.1438 + ChanOffsetTable[i] = 0; 3.1439 + continue; 3.1440 + } 3.1441 + //Make sure the four op channels follow eachother 3.1442 + if ( index < 6 ) { 3.1443 + index = (index % 3) * 2 + ( index / 3 ); 3.1444 + } 3.1445 + //Add back the bits for highest ones 3.1446 + if ( i >= 16 ) 3.1447 + index += 9; 3.1448 + Bitu blah = reinterpret_cast<Bitu>( &(chip->chan[ index ]) ); 3.1449 + ChanOffsetTable[i] = blah; 3.1450 + } 3.1451 + //Same for operators 3.1452 + for ( Bitu i = 0; i < 64; i++ ) { 3.1453 + if ( i % 8 >= 6 || ( (i / 8) % 4 == 3 ) ) { 3.1454 + OpOffsetTable[i] = 0; 3.1455 + continue; 3.1456 + } 3.1457 + Bitu chNum = (i / 8) * 3 + (i % 8) % 3; 3.1458 + //Make sure we use 16 and up for the 2nd range to match the chanoffset gap 3.1459 + if ( chNum >= 12 ) 3.1460 + chNum += 16 - 12; 3.1461 + Bitu opNum = ( i % 8 ) / 3; 3.1462 + DBOPL::Channel* chan = 0; 3.1463 + Bitu blah = reinterpret_cast<Bitu>( &(chan->op[opNum]) ); 3.1464 + OpOffsetTable[i] = ChanOffsetTable[ chNum ] + blah; 3.1465 + } 3.1466 +#if 0 3.1467 + //Stupid checks if table's are correct 3.1468 + for ( Bitu i = 0; i < 18; i++ ) { 3.1469 + Bit32u find = (Bit16u)( &(chip->chan[ i ]) ); 3.1470 + for ( Bitu c = 0; c < 32; c++ ) { 3.1471 + if ( ChanOffsetTable[c] == find ) { 3.1472 + find = 0; 3.1473 + break; 3.1474 + } 3.1475 + } 3.1476 + if ( find ) { 3.1477 + find = find; 3.1478 + } 3.1479 + } 3.1480 + for ( Bitu i = 0; i < 36; i++ ) { 3.1481 + Bit32u find = (Bit16u)( &(chip->chan[ i / 2 ].op[i % 2]) ); 3.1482 + for ( Bitu c = 0; c < 64; c++ ) { 3.1483 + if ( OpOffsetTable[c] == find ) { 3.1484 + find = 0; 3.1485 + break; 3.1486 + } 3.1487 + } 3.1488 + if ( find ) { 3.1489 + find = find; 3.1490 + } 3.1491 + } 3.1492 +#endif 3.1493 +} 3.1494 + 3.1495 +/*Bit32u Handler::WriteAddr( Bit32u port, Bit8u val ) { 3.1496 + return chip.WriteAddr( port, val ); 3.1497 + 3.1498 +} 3.1499 +void Handler::WriteReg( Bit32u addr, Bit8u val ) { 3.1500 + chip.WriteReg( addr, val ); 3.1501 +} 3.1502 + 3.1503 +void Handler::Generate( MixerChannel* chan, Bitu samples ) { 3.1504 + Bit32s buffer[ 512 * 2 ]; 3.1505 + if ( GCC_UNLIKELY(samples > 512) ) 3.1506 + samples = 512; 3.1507 + if ( !chip.opl3Active ) { 3.1508 + chip.GenerateBlock2( samples, buffer ); 3.1509 + chan->AddSamples_m32( samples, buffer ); 3.1510 + } else { 3.1511 + chip.GenerateBlock3( samples, buffer ); 3.1512 + chan->AddSamples_s32( samples, buffer ); 3.1513 + } 3.1514 +} 3.1515 + 3.1516 +void Handler::Init( Bitu rate ) { 3.1517 + InitTables(); 3.1518 + chip.Setup( rate ); 3.1519 +}*/ 3.1520 + 3.1521 + 3.1522 +}; //Namespace DBOPL 3.1523 +
4.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 4.2 +++ b/src/dosbox/dbopl.h Thu Feb 27 19:42:06 2014 +0000 4.3 @@ -0,0 +1,273 @@ 4.4 +/* 4.5 + * Copyright (C) 2002-2010 The DOSBox Team 4.6 + * 4.7 + * This program is free software; you can redistribute it and/or modify 4.8 + * it under the terms of the GNU General Public License as published by 4.9 + * the Free Software Foundation; either version 2 of the License, or 4.10 + * (at your option) any later version. 4.11 + * 4.12 + * This program is distributed in the hope that it will be useful, 4.13 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 4.14 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 4.15 + * GNU General Public License for more details. 4.16 + * 4.17 + * You should have received a copy of the GNU General Public License 4.18 + * along with this program; if not, write to the Free Software 4.19 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 4.20 + */ 4.21 + 4.22 +//#include "adlib.h" 4.23 +//#include "dosbox.h" 4.24 +#include <stdint.h> 4.25 +typedef signed int Bits; 4.26 +typedef unsigned int Bitu; 4.27 +typedef int8_t Bit8s; 4.28 +typedef uint8_t Bit8u; 4.29 +typedef int16_t Bit16s; 4.30 +typedef uint16_t Bit16u; 4.31 +typedef int32_t Bit32s; 4.32 +typedef uint32_t Bit32u; 4.33 + 4.34 +#define INLINE inline 4.35 + 4.36 +#define GCC_UNLIKELY(x) (x) 4.37 + 4.38 +//Use 8 handlers based on a small logatirmic wavetabe and an exponential table for volume 4.39 +#define WAVE_HANDLER 10 4.40 +//Use a logarithmic wavetable with an exponential table for volume 4.41 +#define WAVE_TABLELOG 11 4.42 +//Use a linear wavetable with a multiply table for volume 4.43 +#define WAVE_TABLEMUL 12 4.44 + 4.45 +//Select the type of wave generator routine 4.46 +#define DBOPL_WAVE WAVE_TABLEMUL 4.47 + 4.48 +namespace DBOPL { 4.49 + 4.50 +struct Chip; 4.51 +struct Operator; 4.52 +struct Channel; 4.53 + 4.54 +#if (DBOPL_WAVE == WAVE_HANDLER) 4.55 +typedef Bits ( DB_FASTCALL *WaveHandler) ( Bitu i, Bitu volume ); 4.56 +#endif 4.57 + 4.58 +typedef Bits ( DBOPL::Operator::*VolumeHandler) ( ); 4.59 +typedef Channel* ( DBOPL::Channel::*SynthHandler) ( Chip* chip, Bit32u samples, Bit32s* output ); 4.60 + 4.61 +//Different synth modes that can generate blocks of data 4.62 +typedef enum { 4.63 + sm2AM, 4.64 + sm2FM, 4.65 + sm3AM, 4.66 + sm3FM, 4.67 + sm4Start, 4.68 + sm3FMFM, 4.69 + sm3AMFM, 4.70 + sm3FMAM, 4.71 + sm3AMAM, 4.72 + sm6Start, 4.73 + sm2Percussion, 4.74 + sm3Percussion, 4.75 +} SynthMode; 4.76 + 4.77 +//Shifts for the values contained in chandata variable 4.78 +enum { 4.79 + SHIFT_KSLBASE = 16, 4.80 + SHIFT_KEYCODE = 24, 4.81 +}; 4.82 + 4.83 +struct Operator { 4.84 +public: 4.85 + //Masks for operator 20 values 4.86 + enum { 4.87 + MASK_KSR = 0x10, 4.88 + MASK_SUSTAIN = 0x20, 4.89 + MASK_VIBRATO = 0x40, 4.90 + MASK_TREMOLO = 0x80, 4.91 + }; 4.92 + 4.93 + typedef enum { 4.94 + OFF, 4.95 + RELEASE, 4.96 + SUSTAIN, 4.97 + DECAY, 4.98 + ATTACK, 4.99 + } State; 4.100 + 4.101 + VolumeHandler volHandler; 4.102 + 4.103 +#if (DBOPL_WAVE == WAVE_HANDLER) 4.104 + WaveHandler waveHandler; //Routine that generate a wave 4.105 +#else 4.106 + Bit16s* waveBase; 4.107 + Bit32u waveMask; 4.108 + Bit32u waveStart; 4.109 +#endif 4.110 + Bit32u waveIndex; //WAVE_BITS shifted counter of the frequency index 4.111 + Bit32u waveAdd; //The base frequency without vibrato 4.112 + Bit32u waveCurrent; //waveAdd + vibratao 4.113 + 4.114 + Bit32u chanData; //Frequency/octave and derived data coming from whatever channel controls this 4.115 + Bit32u freqMul; //Scale channel frequency with this, TODO maybe remove? 4.116 + Bit32u vibrato; //Scaled up vibrato strength 4.117 + Bit32s sustainLevel; //When stopping at sustain level stop here 4.118 + Bit32s totalLevel; //totalLevel is added to every generated volume 4.119 + Bit32u currentLevel; //totalLevel + tremolo 4.120 + Bit32s volume; //The currently active volume 4.121 + 4.122 + Bit32u attackAdd; //Timers for the different states of the envelope 4.123 + Bit32u decayAdd; 4.124 + Bit32u releaseAdd; 4.125 + Bit32u rateIndex; //Current position of the evenlope 4.126 + 4.127 + Bit8u rateZero; //Bits for the different states of the envelope having no changes 4.128 + Bit8u keyOn; //Bitmask of different values that can generate keyon 4.129 + //Registers, also used to check for changes 4.130 + Bit8u reg20, reg40, reg60, reg80, regE0; 4.131 + //Active part of the envelope we're in 4.132 + Bit8u state; 4.133 + //0xff when tremolo is enabled 4.134 + Bit8u tremoloMask; 4.135 + //Strength of the vibrato 4.136 + Bit8u vibStrength; 4.137 + //Keep track of the calculated KSR so we can check for changes 4.138 + Bit8u ksr; 4.139 +private: 4.140 + void SetState( Bit8u s ); 4.141 + void UpdateAttack( const Chip* chip ); 4.142 + void UpdateRelease( const Chip* chip ); 4.143 + void UpdateDecay( const Chip* chip ); 4.144 +public: 4.145 + void UpdateAttenuation(); 4.146 + void UpdateRates( const Chip* chip ); 4.147 + void UpdateFrequency( ); 4.148 + 4.149 + void Write20( const Chip* chip, Bit8u val ); 4.150 + void Write40( const Chip* chip, Bit8u val ); 4.151 + void Write60( const Chip* chip, Bit8u val ); 4.152 + void Write80( const Chip* chip, Bit8u val ); 4.153 + void WriteE0( const Chip* chip, Bit8u val ); 4.154 + 4.155 + bool Silent() const; 4.156 + void Prepare( const Chip* chip ); 4.157 + 4.158 + void KeyOn( Bit8u mask); 4.159 + void KeyOff( Bit8u mask); 4.160 + 4.161 + template< State state> 4.162 + Bits TemplateVolume( ); 4.163 + 4.164 + Bit32s RateForward( Bit32u add ); 4.165 + Bitu ForwardWave(); 4.166 + Bitu ForwardVolume(); 4.167 + 4.168 + Bits GetSample( Bits modulation ); 4.169 + Bits GetWave( Bitu index, Bitu vol ); 4.170 +public: 4.171 + Operator(); 4.172 +}; 4.173 + 4.174 +struct Channel { 4.175 + Operator op[2]; 4.176 + inline Operator* Op( Bitu index ) { 4.177 + return &( ( this + (index >> 1) )->op[ index & 1 ]); 4.178 + } 4.179 + SynthHandler synthHandler; 4.180 + Bit32u chanData; //Frequency/octave and derived values 4.181 + Bit32s old[2]; //Old data for feedback 4.182 + 4.183 + Bit8u feedback; //Feedback shift 4.184 + Bit8u regB0; //Register values to check for changes 4.185 + Bit8u regC0; 4.186 + //This should correspond with reg104, bit 6 indicates a Percussion channel, bit 7 indicates a silent channel 4.187 + Bit8u fourMask; 4.188 + Bit8s maskLeft; //Sign extended values for both channel's panning 4.189 + Bit8s maskRight; 4.190 + 4.191 + //Forward the channel data to the operators of the channel 4.192 + void SetChanData( const Chip* chip, Bit32u data ); 4.193 + //Change in the chandata, check for new values and if we have to forward to operators 4.194 + void UpdateFrequency( const Chip* chip, Bit8u fourOp ); 4.195 + void WriteA0( const Chip* chip, Bit8u val ); 4.196 + void WriteB0( const Chip* chip, Bit8u val ); 4.197 + void WriteC0( const Chip* chip, Bit8u val ); 4.198 + void ResetC0( const Chip* chip ); 4.199 + 4.200 + //call this for the first channel 4.201 + template< bool opl3Mode > 4.202 + void GeneratePercussion( Chip* chip, Bit32s* output ); 4.203 + 4.204 + //Generate blocks of data in specific modes 4.205 + template<SynthMode mode> 4.206 + Channel* BlockTemplate( Chip* chip, Bit32u samples, Bit32s* output ); 4.207 + Channel(); 4.208 +}; 4.209 + 4.210 +struct Chip { 4.211 + //This is used as the base counter for vibrato and tremolo 4.212 + Bit32u lfoCounter; 4.213 + Bit32u lfoAdd; 4.214 + 4.215 + 4.216 + Bit32u noiseCounter; 4.217 + Bit32u noiseAdd; 4.218 + Bit32u noiseValue; 4.219 + 4.220 + //Frequency scales for the different multiplications 4.221 + Bit32u freqMul[16]; 4.222 + //Rates for decay and release for rate of this chip 4.223 + Bit32u linearRates[76]; 4.224 + //Best match attack rates for the rate of this chip 4.225 + Bit32u attackRates[76]; 4.226 + 4.227 + //18 channels with 2 operators each 4.228 + Channel chan[18]; 4.229 + 4.230 + Bit8u reg104; 4.231 + Bit8u reg08; 4.232 + Bit8u reg04; 4.233 + Bit8u regBD; 4.234 + Bit8u vibratoIndex; 4.235 + Bit8u tremoloIndex; 4.236 + Bit8s vibratoSign; 4.237 + Bit8u vibratoShift; 4.238 + Bit8u tremoloValue; 4.239 + Bit8u vibratoStrength; 4.240 + Bit8u tremoloStrength; 4.241 + //Mask for allowed wave forms 4.242 + Bit8u waveFormMask; 4.243 + //0 or -1 when enabled 4.244 + Bit8s opl3Active; 4.245 + 4.246 + int is_opl3; 4.247 + 4.248 + //Return the maximum amount of samples before and LFO change 4.249 + Bit32u ForwardLFO( Bit32u samples ); 4.250 + Bit32u ForwardNoise(); 4.251 + 4.252 + void WriteBD( Bit8u val ); 4.253 + void WriteReg(Bit32u reg, Bit8u val ); 4.254 + 4.255 + Bit32u WriteAddr( Bit32u port, Bit8u val ); 4.256 + 4.257 + void GenerateBlock2( Bitu samples, Bit32s* output ); 4.258 + void GenerateBlock3( Bitu samples, Bit32s* output ); 4.259 + 4.260 + void Generate( Bit32u samples ); 4.261 + void Setup( Bit32u r, int chip_is_opl3 ); 4.262 + 4.263 + Chip(); 4.264 +}; 4.265 + 4.266 +/*struct Handler : public Adlib::Handler { 4.267 + DBOPL::Chip chip; 4.268 + virtual Bit32u WriteAddr( Bit32u port, Bit8u val ); 4.269 + virtual void WriteReg( Bit32u addr, Bit8u val ); 4.270 + virtual void Generate( MixerChannel* chan, Bitu samples ); 4.271 + virtual void Init( Bitu rate ); 4.272 +};*/ 4.273 + 4.274 +void InitTables( void ); 4.275 + 4.276 +}; //Namespace
5.1 --- a/src/mame/fmopl.c Tue Feb 11 19:44:32 2014 +0000 5.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 5.3 @@ -1,2613 +0,0 @@ 5.4 -/* 5.5 -** 5.6 -** File: fmopl.c - software implementation of FM sound generator 5.7 -** types OPL and OPL2 5.8 -** 5.9 -** Copyright Jarek Burczynski (bujar at mame dot net) 5.10 -** Copyright Tatsuyuki Satoh , MultiArcadeMachineEmulator development 5.11 -** 5.12 -** Version 0.72 5.13 -** 5.14 - 5.15 -Revision History: 5.16 - 5.17 -04-08-2003 Jarek Burczynski: 5.18 - - removed BFRDY hack. BFRDY is busy flag, and it should be 0 only when the chip 5.19 - handles memory read/write or during the adpcm synthesis when the chip 5.20 - requests another byte of ADPCM data. 5.21 - 5.22 -24-07-2003 Jarek Burczynski: 5.23 - - added a small hack for Y8950 status BFRDY flag (bit 3 should be set after 5.24 - some (unknown) delay). Right now it's always set. 5.25 - 5.26 -14-06-2003 Jarek Burczynski: 5.27 - - implemented all of the status register flags in Y8950 emulation 5.28 - - renamed y8950_set_delta_t_memory() parameters from _rom_ to _mem_ since 5.29 - they can be either RAM or ROM 5.30 - 5.31 -08-10-2002 Jarek Burczynski (thanks to Dox for the YM3526 chip) 5.32 - - corrected ym3526_read() to always set bit 2 and bit 1 5.33 - to HIGH state - identical to ym3812_read (verified on real YM3526) 5.34 - 5.35 -04-28-2002 Jarek Burczynski: 5.36 - - binary exact Envelope Generator (verified on real YM3812); 5.37 - compared to YM2151: the EG clock is equal to internal_clock, 5.38 - rates are 2 times slower and volume resolution is one bit less 5.39 - - modified interface functions (they no longer return pointer - 5.40 - that's internal to the emulator now): 5.41 - - new wrapper functions for OPLCreate: ym3526_init(), ym3812_init() and y8950_init() 5.42 - - corrected 'off by one' error in feedback calculations (when feedback is off) 5.43 - - enabled waveform usage (credit goes to Vlad Romascanu and zazzal22) 5.44 - - speeded up noise generator calculations (Nicola Salmoria) 5.45 - 5.46 -03-24-2002 Jarek Burczynski (thanks to Dox for the YM3812 chip) 5.47 - Complete rewrite (all verified on real YM3812): 5.48 - - corrected sin_tab and tl_tab data 5.49 - - corrected operator output calculations 5.50 - - corrected waveform_select_enable register; 5.51 - simply: ignore all writes to waveform_select register when 5.52 - waveform_select_enable == 0 and do not change the waveform previously selected. 5.53 - - corrected KSR handling 5.54 - - corrected Envelope Generator: attack shape, Sustain mode and 5.55 - Percussive/Non-percussive modes handling 5.56 - - Envelope Generator rates are two times slower now 5.57 - - LFO amplitude (tremolo) and phase modulation (vibrato) 5.58 - - rhythm sounds phase generation 5.59 - - white noise generator (big thanks to Olivier Galibert for mentioning Berlekamp-Massey algorithm) 5.60 - - corrected key on/off handling (the 'key' signal is ORed from three sources: FM, rhythm and CSM) 5.61 - - funky details (like ignoring output of operator 1 in BD rhythm sound when connect == 1) 5.62 - 5.63 -12-28-2001 Acho A. Tang 5.64 - - reflected Delta-T EOS status on Y8950 status port. 5.65 - - fixed subscription range of attack/decay tables 5.66 - 5.67 - 5.68 - To do: 5.69 - add delay before key off in CSM mode (see CSMKeyControll) 5.70 - verify volume of the FM part on the Y8950 5.71 -*/ 5.72 - 5.73 -#include <stdio.h> 5.74 -#include <stdint.h> 5.75 -#include <math.h> 5.76 -#include <string.h> 5.77 -#include <stdlib.h> 5.78 -//#include "emu.h" 5.79 -//#include "ymdeltat.h" 5.80 -#include "fmopl.h" 5.81 - 5.82 - 5.83 - 5.84 -/* output final shift */ 5.85 -#if (OPL_SAMPLE_BITS==16) 5.86 - #define FINAL_SH (0) 5.87 - #define MAXOUT (+32767) 5.88 - #define MINOUT (-32768) 5.89 -#else 5.90 - #define FINAL_SH (8) 5.91 - #define MAXOUT (+127) 5.92 - #define MINOUT (-128) 5.93 -#endif 5.94 - 5.95 - 5.96 -#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */ 5.97 -#define EG_SH 16 /* 16.16 fixed point (EG timing) */ 5.98 -#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */ 5.99 -#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */ 5.100 - 5.101 -#define FREQ_MASK ((1<<FREQ_SH)-1) 5.102 - 5.103 -/* envelope output entries */ 5.104 -#define ENV_BITS 10 5.105 -#define ENV_LEN (1<<ENV_BITS) 5.106 -#define ENV_STEP (128.0/ENV_LEN) 5.107 - 5.108 -#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/ 5.109 -#define MIN_ATT_INDEX (0) 5.110 - 5.111 -/* sinwave entries */ 5.112 -#define SIN_BITS 10 5.113 -#define SIN_LEN (1<<SIN_BITS) 5.114 -#define SIN_MASK (SIN_LEN-1) 5.115 - 5.116 -#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */ 5.117 - 5.118 - 5.119 - 5.120 -/* register number to channel number , slot offset */ 5.121 -#define SLOT1 0 5.122 -#define SLOT2 1 5.123 - 5.124 -/* Envelope Generator phases */ 5.125 - 5.126 -#define EG_ATT 4 5.127 -#define EG_DEC 3 5.128 -#define EG_SUS 2 5.129 -#define EG_REL 1 5.130 -#define EG_OFF 0 5.131 - 5.132 - 5.133 -/* save output as raw 16-bit sample */ 5.134 - 5.135 -/*#define SAVE_SAMPLE*/ 5.136 - 5.137 -#ifdef SAVE_SAMPLE 5.138 -INLINE signed int acc_calc(signed int value) 5.139 -{ 5.140 - if (value>=0) 5.141 - { 5.142 - if (value < 0x0200) 5.143 - return (value & ~0); 5.144 - if (value < 0x0400) 5.145 - return (value & ~1); 5.146 - if (value < 0x0800) 5.147 - return (value & ~3); 5.148 - if (value < 0x1000) 5.149 - return (value & ~7); 5.150 - if (value < 0x2000) 5.151 - return (value & ~15); 5.152 - if (value < 0x4000) 5.153 - return (value & ~31); 5.154 - return (value & ~63); 5.155 - } 5.156 - /*else value < 0*/ 5.157 - if (value > -0x0200) 5.158 - return (~abs(value) & ~0); 5.159 - if (value > -0x0400) 5.160 - return (~abs(value) & ~1); 5.161 - if (value > -0x0800) 5.162 - return (~abs(value) & ~3); 5.163 - if (value > -0x1000) 5.164 - return (~abs(value) & ~7); 5.165 - if (value > -0x2000) 5.166 - return (~abs(value) & ~15); 5.167 - if (value > -0x4000) 5.168 - return (~abs(value) & ~31); 5.169 - return (~abs(value) & ~63); 5.170 -} 5.171 - 5.172 - 5.173 -static FILE *sample[1]; 5.174 - #if 1 /*save to MONO file */ 5.175 - #define SAVE_ALL_CHANNELS \ 5.176 - { signed int pom = acc_calc(lt); \ 5.177 - fputc((unsigned short)pom&0xff,sample[0]); \ 5.178 - fputc(((unsigned short)pom>>8)&0xff,sample[0]); \ 5.179 - } 5.180 - #else /*save to STEREO file */ 5.181 - #define SAVE_ALL_CHANNELS \ 5.182 - { signed int pom = lt; \ 5.183 - fputc((unsigned short)pom&0xff,sample[0]); \ 5.184 - fputc(((unsigned short)pom>>8)&0xff,sample[0]); \ 5.185 - pom = rt; \ 5.186 - fputc((unsigned short)pom&0xff,sample[0]); \ 5.187 - fputc(((unsigned short)pom>>8)&0xff,sample[0]); \ 5.188 - } 5.189 - #endif 5.190 -#endif 5.191 - 5.192 -#define LOG_CYM_FILE 0 5.193 -static FILE * cymfile = NULL; 5.194 - 5.195 - 5.196 - 5.197 -#define OPL_TYPE_WAVESEL 0x01 /* waveform select */ 5.198 -#define OPL_TYPE_ADPCM 0x02 /* DELTA-T ADPCM unit */ 5.199 -#define OPL_TYPE_KEYBOARD 0x04 /* keyboard interface */ 5.200 -#define OPL_TYPE_IO 0x08 /* I/O port */ 5.201 - 5.202 -/* ---------- Generic interface section ---------- */ 5.203 -#define OPL_TYPE_YM3526 (0) 5.204 -#define OPL_TYPE_YM3812 (OPL_TYPE_WAVESEL) 5.205 -#define OPL_TYPE_Y8950 (OPL_TYPE_ADPCM|OPL_TYPE_KEYBOARD|OPL_TYPE_IO) 5.206 - 5.207 - 5.208 - 5.209 -typedef struct{ 5.210 - UINT32 ar; /* attack rate: AR<<2 */ 5.211 - UINT32 dr; /* decay rate: DR<<2 */ 5.212 - UINT32 rr; /* release rate:RR<<2 */ 5.213 - UINT8 KSR; /* key scale rate */ 5.214 - UINT8 ksl; /* keyscale level */ 5.215 - UINT8 ksr; /* key scale rate: kcode>>KSR */ 5.216 - UINT8 mul; /* multiple: mul_tab[ML] */ 5.217 - 5.218 - /* Phase Generator */ 5.219 - UINT32 Cnt; /* frequency counter */ 5.220 - UINT32 Incr; /* frequency counter step */ 5.221 - UINT8 FB; /* feedback shift value */ 5.222 - INT32 *connect1; /* slot1 output pointer */ 5.223 - INT32 op1_out[2]; /* slot1 output for feedback */ 5.224 - UINT8 CON; /* connection (algorithm) type */ 5.225 - 5.226 - /* Envelope Generator */ 5.227 - UINT8 eg_type; /* percussive/non-percussive mode */ 5.228 - UINT8 state; /* phase type */ 5.229 - UINT32 TL; /* total level: TL << 2 */ 5.230 - INT32 TLL; /* adjusted now TL */ 5.231 - INT32 volume; /* envelope counter */ 5.232 - UINT32 sl; /* sustain level: sl_tab[SL] */ 5.233 - UINT8 eg_sh_ar; /* (attack state) */ 5.234 - UINT8 eg_sel_ar; /* (attack state) */ 5.235 - UINT8 eg_sh_dr; /* (decay state) */ 5.236 - UINT8 eg_sel_dr; /* (decay state) */ 5.237 - UINT8 eg_sh_rr; /* (release state) */ 5.238 - UINT8 eg_sel_rr; /* (release state) */ 5.239 - UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */ 5.240 - 5.241 - /* LFO */ 5.242 - UINT32 AMmask; /* LFO Amplitude Modulation enable mask */ 5.243 - UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/ 5.244 - 5.245 - /* waveform select */ 5.246 - UINT16 wavetable; 5.247 -} OPL_SLOT; 5.248 - 5.249 -typedef struct{ 5.250 - OPL_SLOT SLOT[2]; 5.251 - /* phase generator state */ 5.252 - UINT32 block_fnum; /* block+fnum */ 5.253 - UINT32 fc; /* Freq. Increment base */ 5.254 - UINT32 ksl_base; /* KeyScaleLevel Base step */ 5.255 - UINT8 kcode; /* key code (for key scaling) */ 5.256 -} OPL_CH; 5.257 - 5.258 -/* OPL state */ 5.259 -typedef struct fm_opl_f { 5.260 - /* FM channel slots */ 5.261 - OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/ 5.262 - 5.263 - UINT32 eg_cnt; /* global envelope generator counter */ 5.264 - UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */ 5.265 - UINT32 eg_timer_add; /* step of eg_timer */ 5.266 - UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */ 5.267 - 5.268 - UINT8 rhythm; /* Rhythm mode */ 5.269 - 5.270 - UINT32 fn_tab[1024]; /* fnumber->increment counter */ 5.271 - 5.272 - /* LFO */ 5.273 - UINT8 lfo_am_depth; 5.274 - UINT8 lfo_pm_depth_range; 5.275 - UINT32 lfo_am_cnt; 5.276 - UINT32 lfo_am_inc; 5.277 - UINT32 lfo_pm_cnt; 5.278 - UINT32 lfo_pm_inc; 5.279 - 5.280 - UINT32 noise_rng; /* 23 bit noise shift register */ 5.281 - UINT32 noise_p; /* current noise 'phase' */ 5.282 - UINT32 noise_f; /* current noise period */ 5.283 - 5.284 - UINT8 wavesel; /* waveform select enable flag */ 5.285 - 5.286 - UINT32 T[2]; /* timer counters */ 5.287 - UINT8 st[2]; /* timer enable */ 5.288 - 5.289 -#if BUILD_Y8950 5.290 - /* Delta-T ADPCM unit (Y8950) */ 5.291 - 5.292 - YM_DELTAT *deltat; 5.293 - 5.294 - /* Keyboard and I/O ports interface */ 5.295 - UINT8 portDirection; 5.296 - UINT8 portLatch; 5.297 - OPL_PORTHANDLER_R porthandler_r; 5.298 - OPL_PORTHANDLER_W porthandler_w; 5.299 - void * port_param; 5.300 - OPL_PORTHANDLER_R keyboardhandler_r; 5.301 - OPL_PORTHANDLER_W keyboardhandler_w; 5.302 - void * keyboard_param; 5.303 -#endif 5.304 - 5.305 - /* external event callback handlers */ 5.306 - OPL_TIMERHANDLER timer_handler; /* TIMER handler */ 5.307 - void *TimerParam; /* TIMER parameter */ 5.308 - OPL_IRQHANDLER IRQHandler; /* IRQ handler */ 5.309 - void *IRQParam; /* IRQ parameter */ 5.310 - OPL_UPDATEHANDLER UpdateHandler;/* stream update handler */ 5.311 - void *UpdateParam; /* stream update parameter */ 5.312 - 5.313 - UINT8 type; /* chip type */ 5.314 - UINT8 address; /* address register */ 5.315 - UINT8 status; /* status flag */ 5.316 - UINT8 statusmask; /* status mask */ 5.317 - UINT8 mode; /* Reg.08 : CSM,notesel,etc. */ 5.318 - 5.319 - UINT32 clock; /* master clock (Hz) */ 5.320 - UINT32 rate; /* sampling rate (Hz) */ 5.321 - double freqbase; /* frequency base */ 5.322 - attotime TimerBase; /* Timer base time (==sampling time)*/ 5.323 - running_device *device; 5.324 -} FM_OPL; 5.325 - 5.326 - 5.327 - 5.328 -/* mapping of register number (offset) to slot number used by the emulator */ 5.329 -static const int slot_array[32]= 5.330 -{ 5.331 - 0, 2, 4, 1, 3, 5,-1,-1, 5.332 - 6, 8,10, 7, 9,11,-1,-1, 5.333 - 12,14,16,13,15,17,-1,-1, 5.334 - -1,-1,-1,-1,-1,-1,-1,-1 5.335 -}; 5.336 - 5.337 -/* key scale level */ 5.338 -/* table is 3dB/octave , DV converts this into 6dB/octave */ 5.339 -/* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */ 5.340 -#define DV (0.1875/2.0) 5.341 -static const UINT32 ksl_tab[8*16]= 5.342 -{ 5.343 - /* OCT 0 */ 5.344 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.345 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.346 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.347 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.348 - /* OCT 1 */ 5.349 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.350 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.351 - 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV, 5.352 - 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV, 5.353 - /* OCT 2 */ 5.354 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 5.355 - 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV, 5.356 - 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV, 5.357 - 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV, 5.358 - /* OCT 3 */ 5.359 - 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV, 5.360 - 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV, 5.361 - 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV, 5.362 - 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV, 5.363 - /* OCT 4 */ 5.364 - 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV, 5.365 - 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV, 5.366 - 9.000/DV, 9.750/DV,10.125/DV,10.500/DV, 5.367 - 10.875/DV,11.250/DV,11.625/DV,12.000/DV, 5.368 - /* OCT 5 */ 5.369 - 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV, 5.370 - 9.000/DV,10.125/DV,10.875/DV,11.625/DV, 5.371 - 12.000/DV,12.750/DV,13.125/DV,13.500/DV, 5.372 - 13.875/DV,14.250/DV,14.625/DV,15.000/DV, 5.373 - /* OCT 6 */ 5.374 - 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV, 5.375 - 12.000/DV,13.125/DV,13.875/DV,14.625/DV, 5.376 - 15.000/DV,15.750/DV,16.125/DV,16.500/DV, 5.377 - 16.875/DV,17.250/DV,17.625/DV,18.000/DV, 5.378 - /* OCT 7 */ 5.379 - 0.000/DV, 9.000/DV,12.000/DV,13.875/DV, 5.380 - 15.000/DV,16.125/DV,16.875/DV,17.625/DV, 5.381 - 18.000/DV,18.750/DV,19.125/DV,19.500/DV, 5.382 - 19.875/DV,20.250/DV,20.625/DV,21.000/DV 5.383 -}; 5.384 -#undef DV 5.385 - 5.386 -/* sustain level table (3dB per step) */ 5.387 -/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/ 5.388 -#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) ) 5.389 -static const UINT32 sl_tab[16]={ 5.390 - SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7), 5.391 - SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31) 5.392 -}; 5.393 -#undef SC 5.394 - 5.395 - 5.396 -#define RATE_STEPS (8) 5.397 -static const unsigned char eg_inc[15*RATE_STEPS]={ 5.398 - 5.399 -/*cycle:0 1 2 3 4 5 6 7*/ 5.400 - 5.401 -/* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */ 5.402 -/* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */ 5.403 -/* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */ 5.404 -/* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */ 5.405 - 5.406 -/* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */ 5.407 -/* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */ 5.408 -/* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */ 5.409 -/* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */ 5.410 - 5.411 -/* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */ 5.412 -/* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */ 5.413 -/*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */ 5.414 -/*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */ 5.415 - 5.416 -/*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */ 5.417 -/*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */ 5.418 -/*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */ 5.419 -}; 5.420 - 5.421 - 5.422 -#define O(a) (a*RATE_STEPS) 5.423 - 5.424 -/*note that there is no O(13) in this table - it's directly in the code */ 5.425 -static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */ 5.426 -/* 16 infinite time rates */ 5.427 -O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14), 5.428 -O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14), 5.429 - 5.430 -/* rates 00-12 */ 5.431 -O( 0),O( 1),O( 2),O( 3), 5.432 -O( 0),O( 1),O( 2),O( 3), 5.433 -O( 0),O( 1),O( 2),O( 3), 5.434 -O( 0),O( 1),O( 2),O( 3), 5.435 -O( 0),O( 1),O( 2),O( 3), 5.436 -O( 0),O( 1),O( 2),O( 3), 5.437 -O( 0),O( 1),O( 2),O( 3), 5.438 -O( 0),O( 1),O( 2),O( 3), 5.439 -O( 0),O( 1),O( 2),O( 3), 5.440 -O( 0),O( 1),O( 2),O( 3), 5.441 -O( 0),O( 1),O( 2),O( 3), 5.442 -O( 0),O( 1),O( 2),O( 3), 5.443 -O( 0),O( 1),O( 2),O( 3), 5.444 - 5.445 -/* rate 13 */ 5.446 -O( 4),O( 5),O( 6),O( 7), 5.447 - 5.448 -/* rate 14 */ 5.449 -O( 8),O( 9),O(10),O(11), 5.450 - 5.451 -/* rate 15 */ 5.452 -O(12),O(12),O(12),O(12), 5.453 - 5.454 -/* 16 dummy rates (same as 15 3) */ 5.455 -O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12), 5.456 -O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12), 5.457 - 5.458 -}; 5.459 -#undef O 5.460 - 5.461 -/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */ 5.462 -/*shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0 */ 5.463 -/*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */ 5.464 - 5.465 -#define O(a) (a*1) 5.466 -static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */ 5.467 -/* 16 infinite time rates */ 5.468 -O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), 5.469 -O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), 5.470 - 5.471 -/* rates 00-12 */ 5.472 -O(12),O(12),O(12),O(12), 5.473 -O(11),O(11),O(11),O(11), 5.474 -O(10),O(10),O(10),O(10), 5.475 -O( 9),O( 9),O( 9),O( 9), 5.476 -O( 8),O( 8),O( 8),O( 8), 5.477 -O( 7),O( 7),O( 7),O( 7), 5.478 -O( 6),O( 6),O( 6),O( 6), 5.479 -O( 5),O( 5),O( 5),O( 5), 5.480 -O( 4),O( 4),O( 4),O( 4), 5.481 -O( 3),O( 3),O( 3),O( 3), 5.482 -O( 2),O( 2),O( 2),O( 2), 5.483 -O( 1),O( 1),O( 1),O( 1), 5.484 -O( 0),O( 0),O( 0),O( 0), 5.485 - 5.486 -/* rate 13 */ 5.487 -O( 0),O( 0),O( 0),O( 0), 5.488 - 5.489 -/* rate 14 */ 5.490 -O( 0),O( 0),O( 0),O( 0), 5.491 - 5.492 -/* rate 15 */ 5.493 -O( 0),O( 0),O( 0),O( 0), 5.494 - 5.495 -/* 16 dummy rates (same as 15 3) */ 5.496 -O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), 5.497 -O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), 5.498 - 5.499 -}; 5.500 -#undef O 5.501 - 5.502 - 5.503 -/* multiple table */ 5.504 -#define ML 2 5.505 -static const UINT8 mul_tab[16]= { 5.506 -/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */ 5.507 - 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML, 5.508 - 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML 5.509 -}; 5.510 -#undef ML 5.511 - 5.512 -/* TL_TAB_LEN is calculated as: 5.513 -* 12 - sinus amplitude bits (Y axis) 5.514 -* 2 - sinus sign bit (Y axis) 5.515 -* TL_RES_LEN - sinus resolution (X axis) 5.516 -*/ 5.517 -#define TL_TAB_LEN (12*2*TL_RES_LEN) 5.518 -static signed int tl_tab[TL_TAB_LEN]; 5.519 - 5.520 -#define ENV_QUIET (TL_TAB_LEN>>4) 5.521 - 5.522 -/* sin waveform table in 'decibel' scale */ 5.523 -/* four waveforms on OPL2 type chips */ 5.524 -static unsigned int sin_tab[SIN_LEN * 4]; 5.525 - 5.526 - 5.527 -/* LFO Amplitude Modulation table (verified on real YM3812) 5.528 - 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples 5.529 - 5.530 - Length: 210 elements. 5.531 - 5.532 - Each of the elements has to be repeated 5.533 - exactly 64 times (on 64 consecutive samples). 5.534 - The whole table takes: 64 * 210 = 13440 samples. 5.535 - 5.536 - When AM = 1 data is used directly 5.537 - When AM = 0 data is divided by 4 before being used (loosing precision is important) 5.538 -*/ 5.539 - 5.540 -#define LFO_AM_TAB_ELEMENTS 210 5.541 - 5.542 -static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = { 5.543 -0,0,0,0,0,0,0, 5.544 -1,1,1,1, 5.545 -2,2,2,2, 5.546 -3,3,3,3, 5.547 -4,4,4,4, 5.548 -5,5,5,5, 5.549 -6,6,6,6, 5.550 -7,7,7,7, 5.551 -8,8,8,8, 5.552 -9,9,9,9, 5.553 -10,10,10,10, 5.554 -11,11,11,11, 5.555 -12,12,12,12, 5.556 -13,13,13,13, 5.557 -14,14,14,14, 5.558 -15,15,15,15, 5.559 -16,16,16,16, 5.560 -17,17,17,17, 5.561 -18,18,18,18, 5.562 -19,19,19,19, 5.563 -20,20,20,20, 5.564 -21,21,21,21, 5.565 -22,22,22,22, 5.566 -23,23,23,23, 5.567 -24,24,24,24, 5.568 -25,25,25,25, 5.569 -26,26,26, 5.570 -25,25,25,25, 5.571 -24,24,24,24, 5.572 -23,23,23,23, 5.573 -22,22,22,22, 5.574 -21,21,21,21, 5.575 -20,20,20,20, 5.576 -19,19,19,19, 5.577 -18,18,18,18, 5.578 -17,17,17,17, 5.579 -16,16,16,16, 5.580 -15,15,15,15, 5.581 -14,14,14,14, 5.582 -13,13,13,13, 5.583 -12,12,12,12, 5.584 -11,11,11,11, 5.585 -10,10,10,10, 5.586 -9,9,9,9, 5.587 -8,8,8,8, 5.588 -7,7,7,7, 5.589 -6,6,6,6, 5.590 -5,5,5,5, 5.591 -4,4,4,4, 5.592 -3,3,3,3, 5.593 -2,2,2,2, 5.594 -1,1,1,1 5.595 -}; 5.596 - 5.597 -/* LFO Phase Modulation table (verified on real YM3812) */ 5.598 -static const INT8 lfo_pm_table[8*8*2] = { 5.599 - 5.600 -/* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */ 5.601 -0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/ 5.602 -0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/ 5.603 - 5.604 -/* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */ 5.605 -0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/ 5.606 -1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/ 5.607 - 5.608 -/* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */ 5.609 -1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/ 5.610 -2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/ 5.611 - 5.612 -/* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */ 5.613 -1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/ 5.614 -3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/ 5.615 - 5.616 -/* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */ 5.617 -2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/ 5.618 -4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/ 5.619 - 5.620 -/* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */ 5.621 -2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/ 5.622 -5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/ 5.623 - 5.624 -/* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */ 5.625 -3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/ 5.626 -6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/ 5.627 - 5.628 -/* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */ 5.629 -3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/ 5.630 -7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/ 5.631 -}; 5.632 - 5.633 - 5.634 -/* lock level of common table */ 5.635 -static int num_lock = 0; 5.636 - 5.637 - 5.638 -static void *cur_chip = NULL; /* current chip pointer */ 5.639 -static OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2; 5.640 - 5.641 -static signed int phase_modulation; /* phase modulation input (SLOT 2) */ 5.642 -static signed int output[1]; 5.643 - 5.644 -#if BUILD_Y8950 5.645 -static INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */ 5.646 -#endif 5.647 - 5.648 -static UINT32 LFO_AM; 5.649 -static INT32 LFO_PM; 5.650 - 5.651 - 5.652 - 5.653 -INLINE int limit( int val, int max, int min ) { 5.654 - if ( val > max ) 5.655 - val = max; 5.656 - else if ( val < min ) 5.657 - val = min; 5.658 - 5.659 - return val; 5.660 -} 5.661 - 5.662 - 5.663 -/* status set and IRQ handling */ 5.664 -INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag) 5.665 -{ 5.666 - /* set status flag */ 5.667 - OPL->status |= flag; 5.668 - if(!(OPL->status & 0x80)) 5.669 - { 5.670 - if(OPL->status & OPL->statusmask) 5.671 - { /* IRQ on */ 5.672 - OPL->status |= 0x80; 5.673 - /* callback user interrupt handler (IRQ is OFF to ON) */ 5.674 - if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1); 5.675 - } 5.676 - } 5.677 -} 5.678 - 5.679 -/* status reset and IRQ handling */ 5.680 -INLINE void OPL_STATUS_RESET(FM_OPL *OPL,int flag) 5.681 -{ 5.682 - /* reset status flag */ 5.683 - OPL->status &=~flag; 5.684 - if((OPL->status & 0x80)) 5.685 - { 5.686 - if (!(OPL->status & OPL->statusmask) ) 5.687 - { 5.688 - OPL->status &= 0x7f; 5.689 - /* callback user interrupt handler (IRQ is ON to OFF) */ 5.690 - if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0); 5.691 - } 5.692 - } 5.693 -} 5.694 - 5.695 -/* IRQ mask set */ 5.696 -INLINE void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag) 5.697 -{ 5.698 - OPL->statusmask = flag; 5.699 - /* IRQ handling check */ 5.700 - OPL_STATUS_SET(OPL,0); 5.701 - OPL_STATUS_RESET(OPL,0); 5.702 -} 5.703 - 5.704 - 5.705 -/* advance LFO to next sample */ 5.706 -INLINE void advance_lfo(FM_OPL *OPL) 5.707 -{ 5.708 - UINT8 tmp; 5.709 - 5.710 - /* LFO */ 5.711 - OPL->lfo_am_cnt += OPL->lfo_am_inc; 5.712 - if (OPL->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */ 5.713 - OPL->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH); 5.714 - 5.715 - tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ]; 5.716 - 5.717 - if (OPL->lfo_am_depth) 5.718 - LFO_AM = tmp; 5.719 - else 5.720 - LFO_AM = tmp>>2; 5.721 - 5.722 - OPL->lfo_pm_cnt += OPL->lfo_pm_inc; 5.723 - LFO_PM = ((OPL->lfo_pm_cnt>>LFO_SH) & 7) | OPL->lfo_pm_depth_range; 5.724 -} 5.725 - 5.726 -/* advance to next sample */ 5.727 -INLINE void advance(FM_OPL *OPL) 5.728 -{ 5.729 - OPL_CH *CH; 5.730 - OPL_SLOT *op; 5.731 - int i; 5.732 - 5.733 - OPL->eg_timer += OPL->eg_timer_add; 5.734 - 5.735 - while (OPL->eg_timer >= OPL->eg_timer_overflow) 5.736 - { 5.737 - OPL->eg_timer -= OPL->eg_timer_overflow; 5.738 - 5.739 - OPL->eg_cnt++; 5.740 - 5.741 - for (i=0; i<9*2; i++) 5.742 - { 5.743 - CH = &OPL->P_CH[i/2]; 5.744 - op = &CH->SLOT[i&1]; 5.745 - 5.746 - /* Envelope Generator */ 5.747 - switch(op->state) 5.748 - { 5.749 - case EG_ATT: /* attack phase */ 5.750 - if ( !(OPL->eg_cnt & ((1<<op->eg_sh_ar)-1) ) ) 5.751 - { 5.752 - op->volume += (~op->volume * 5.753 - (eg_inc[op->eg_sel_ar + ((OPL->eg_cnt>>op->eg_sh_ar)&7)]) 5.754 - ) >>3; 5.755 - 5.756 - if (op->volume <= MIN_ATT_INDEX) 5.757 - { 5.758 - op->volume = MIN_ATT_INDEX; 5.759 - op->state = EG_DEC; 5.760 - } 5.761 - 5.762 - } 5.763 - break; 5.764 - 5.765 - case EG_DEC: /* decay phase */ 5.766 - if ( !(OPL->eg_cnt & ((1<<op->eg_sh_dr)-1) ) ) 5.767 - { 5.768 - op->volume += eg_inc[op->eg_sel_dr + ((OPL->eg_cnt>>op->eg_sh_dr)&7)]; 5.769 - 5.770 - if ( op->volume >= op->sl ) 5.771 - op->state = EG_SUS; 5.772 - 5.773 - } 5.774 - break; 5.775 - 5.776 - case EG_SUS: /* sustain phase */ 5.777 - 5.778 - /* this is important behaviour: 5.779 - one can change percusive/non-percussive modes on the fly and 5.780 - the chip will remain in sustain phase - verified on real YM3812 */ 5.781 - 5.782 - if(op->eg_type) /* non-percussive mode */ 5.783 - { 5.784 - /* do nothing */ 5.785 - } 5.786 - else /* percussive mode */ 5.787 - { 5.788 - /* during sustain phase chip adds Release Rate (in percussive mode) */ 5.789 - if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) ) 5.790 - { 5.791 - op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)]; 5.792 - 5.793 - if ( op->volume >= MAX_ATT_INDEX ) 5.794 - op->volume = MAX_ATT_INDEX; 5.795 - } 5.796 - /* else do nothing in sustain phase */ 5.797 - } 5.798 - break; 5.799 - 5.800 - case EG_REL: /* release phase */ 5.801 - if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) ) 5.802 - { 5.803 - op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)]; 5.804 - 5.805 - if ( op->volume >= MAX_ATT_INDEX ) 5.806 - { 5.807 - op->volume = MAX_ATT_INDEX; 5.808 - op->state = EG_OFF; 5.809 - } 5.810 - 5.811 - } 5.812 - break; 5.813 - 5.814 - default: 5.815 - break; 5.816 - } 5.817 - } 5.818 - } 5.819 - 5.820 - for (i=0; i<9*2; i++) 5.821 - { 5.822 - CH = &OPL->P_CH[i/2]; 5.823 - op = &CH->SLOT[i&1]; 5.824 - 5.825 - /* Phase Generator */ 5.826 - if(op->vib) 5.827 - { 5.828 - UINT8 block; 5.829 - unsigned int block_fnum = CH->block_fnum; 5.830 - 5.831 - unsigned int fnum_lfo = (block_fnum&0x0380) >> 7; 5.832 - 5.833 - signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ]; 5.834 - 5.835 - if (lfo_fn_table_index_offset) /* LFO phase modulation active */ 5.836 - { 5.837 - block_fnum += lfo_fn_table_index_offset; 5.838 - block = (block_fnum&0x1c00) >> 10; 5.839 - op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul; 5.840 - } 5.841 - else /* LFO phase modulation = zero */ 5.842 - { 5.843 - op->Cnt += op->Incr; 5.844 - } 5.845 - } 5.846 - else /* LFO phase modulation disabled for this operator */ 5.847 - { 5.848 - op->Cnt += op->Incr; 5.849 - } 5.850 - } 5.851 - 5.852 - /* The Noise Generator of the YM3812 is 23-bit shift register. 5.853 - * Period is equal to 2^23-2 samples. 5.854 - * Register works at sampling frequency of the chip, so output 5.855 - * can change on every sample. 5.856 - * 5.857 - * Output of the register and input to the bit 22 is: 5.858 - * bit0 XOR bit14 XOR bit15 XOR bit22 5.859 - * 5.860 - * Simply use bit 22 as the noise output. 5.861 - */ 5.862 - 5.863 - OPL->noise_p += OPL->noise_f; 5.864 - i = OPL->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */ 5.865 - OPL->noise_p &= FREQ_MASK; 5.866 - while (i) 5.867 - { 5.868 - /* 5.869 - UINT32 j; 5.870 - j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1; 5.871 - OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1); 5.872 - */ 5.873 - 5.874 - /* 5.875 - Instead of doing all the logic operations above, we 5.876 - use a trick here (and use bit 0 as the noise output). 5.877 - The difference is only that the noise bit changes one 5.878 - step ahead. This doesn't matter since we don't know 5.879 - what is real state of the noise_rng after the reset. 5.880 - */ 5.881 - 5.882 - if (OPL->noise_rng & 1) OPL->noise_rng ^= 0x800302; 5.883 - OPL->noise_rng >>= 1; 5.884 - 5.885 - i--; 5.886 - } 5.887 -} 5.888 - 5.889 - 5.890 -INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab) 5.891 -{ 5.892 - UINT32 p; 5.893 - 5.894 - p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ]; 5.895 - 5.896 - if (p >= TL_TAB_LEN) 5.897 - return 0; 5.898 - return tl_tab[p]; 5.899 -} 5.900 - 5.901 -INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab) 5.902 -{ 5.903 - UINT32 p; 5.904 - 5.905 - p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm )) >> FREQ_SH ) & SIN_MASK) ]; 5.906 - 5.907 - if (p >= TL_TAB_LEN) 5.908 - return 0; 5.909 - return tl_tab[p]; 5.910 -} 5.911 - 5.912 - 5.913 -#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask)) 5.914 - 5.915 -/* calculate output */ 5.916 -INLINE void OPL_CALC_CH( OPL_CH *CH ) 5.917 -{ 5.918 - OPL_SLOT *SLOT; 5.919 - unsigned int env; 5.920 - signed int out; 5.921 - 5.922 - phase_modulation = 0; 5.923 - 5.924 - /* SLOT 1 */ 5.925 - SLOT = &CH->SLOT[SLOT1]; 5.926 - env = volume_calc(SLOT); 5.927 - out = SLOT->op1_out[0] + SLOT->op1_out[1]; 5.928 - SLOT->op1_out[0] = SLOT->op1_out[1]; 5.929 - *SLOT->connect1 += SLOT->op1_out[0]; 5.930 - SLOT->op1_out[1] = 0; 5.931 - if( env < ENV_QUIET ) 5.932 - { 5.933 - if (!SLOT->FB) 5.934 - out = 0; 5.935 - SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable ); 5.936 - } 5.937 - 5.938 - /* SLOT 2 */ 5.939 - SLOT++; 5.940 - env = volume_calc(SLOT); 5.941 - if( env < ENV_QUIET ) 5.942 - output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable); 5.943 -} 5.944 - 5.945 -/* 5.946 - operators used in the rhythm sounds generation process: 5.947 - 5.948 - Envelope Generator: 5.949 - 5.950 -channel operator register number Bass High Snare Tom Top 5.951 -/ slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal 5.952 - 6 / 0 12 50 70 90 f0 + 5.953 - 6 / 1 15 53 73 93 f3 + 5.954 - 7 / 0 13 51 71 91 f1 + 5.955 - 7 / 1 16 54 74 94 f4 + 5.956 - 8 / 0 14 52 72 92 f2 + 5.957 - 8 / 1 17 55 75 95 f5 + 5.958 - 5.959 - Phase Generator: 5.960 - 5.961 -channel operator register number Bass High Snare Tom Top 5.962 -/ slot number MULTIPLE Drum Hat Drum Tom Cymbal 5.963 - 6 / 0 12 30 + 5.964 - 6 / 1 15 33 + 5.965 - 7 / 0 13 31 + + + 5.966 - 7 / 1 16 34 ----- n o t u s e d ----- 5.967 - 8 / 0 14 32 + 5.968 - 8 / 1 17 35 + + 5.969 - 5.970 -channel operator register number Bass High Snare Tom Top 5.971 -number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal 5.972 - 6 12,15 B6 A6 + 5.973 - 5.974 - 7 13,16 B7 A7 + + + 5.975 - 5.976 - 8 14,17 B8 A8 + + + 5.977 - 5.978 -*/ 5.979 - 5.980 -/* calculate rhythm */ 5.981 - 5.982 -INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise ) 5.983 -{ 5.984 - OPL_SLOT *SLOT; 5.985 - signed int out; 5.986 - unsigned int env; 5.987 - 5.988 - 5.989 - /* Bass Drum (verified on real YM3812): 5.990 - - depends on the channel 6 'connect' register: 5.991 - when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out) 5.992 - when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored 5.993 - - output sample always is multiplied by 2 5.994 - */ 5.995 - 5.996 - phase_modulation = 0; 5.997 - /* SLOT 1 */ 5.998 - SLOT = &CH[6].SLOT[SLOT1]; 5.999 - env = volume_calc(SLOT); 5.1000 - 5.1001 - out = SLOT->op1_out[0] + SLOT->op1_out[1]; 5.1002 - SLOT->op1_out[0] = SLOT->op1_out[1]; 5.1003 - 5.1004 - if (!SLOT->CON) 5.1005 - phase_modulation = SLOT->op1_out[0]; 5.1006 - /* else ignore output of operator 1 */ 5.1007 - 5.1008 - SLOT->op1_out[1] = 0; 5.1009 - if( env < ENV_QUIET ) 5.1010 - { 5.1011 - if (!SLOT->FB) 5.1012 - out = 0; 5.1013 - SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable ); 5.1014 - } 5.1015 - 5.1016 - /* SLOT 2 */ 5.1017 - SLOT++; 5.1018 - env = volume_calc(SLOT); 5.1019 - if( env < ENV_QUIET ) 5.1020 - output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2; 5.1021 - 5.1022 - 5.1023 - /* Phase generation is based on: */ 5.1024 - /* HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) */ 5.1025 - /* SD (16) channel 7->slot 1 */ 5.1026 - /* TOM (14) channel 8->slot 1 */ 5.1027 - /* TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) */ 5.1028 - 5.1029 - /* Envelope generation based on: */ 5.1030 - /* HH channel 7->slot1 */ 5.1031 - /* SD channel 7->slot2 */ 5.1032 - /* TOM channel 8->slot1 */ 5.1033 - /* TOP channel 8->slot2 */ 5.1034 - 5.1035 - 5.1036 - /* The following formulas can be well optimized. 5.1037 - I leave them in direct form for now (in case I've missed something). 5.1038 - */ 5.1039 - 5.1040 - /* High Hat (verified on real YM3812) */ 5.1041 - env = volume_calc(SLOT7_1); 5.1042 - if( env < ENV_QUIET ) 5.1043 - { 5.1044 - 5.1045 - /* high hat phase generation: 5.1046 - phase = d0 or 234 (based on frequency only) 5.1047 - phase = 34 or 2d0 (based on noise) 5.1048 - */ 5.1049 - 5.1050 - /* base frequency derived from operator 1 in channel 7 */ 5.1051 - unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1; 5.1052 - unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1; 5.1053 - unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1; 5.1054 - 5.1055 - unsigned char res1 = (bit2 ^ bit7) | bit3; 5.1056 - 5.1057 - /* when res1 = 0 phase = 0x000 | 0xd0; */ 5.1058 - /* when res1 = 1 phase = 0x200 | (0xd0>>2); */ 5.1059 - UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0; 5.1060 - 5.1061 - /* enable gate based on frequency of operator 2 in channel 8 */ 5.1062 - unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1; 5.1063 - unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1; 5.1064 - 5.1065 - unsigned char res2 = (bit3e ^ bit5e); 5.1066 - 5.1067 - /* when res2 = 0 pass the phase from calculation above (res1); */ 5.1068 - /* when res2 = 1 phase = 0x200 | (0xd0>>2); */ 5.1069 - if (res2) 5.1070 - phase = (0x200|(0xd0>>2)); 5.1071 - 5.1072 - 5.1073 - /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */ 5.1074 - /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */ 5.1075 - if (phase&0x200) 5.1076 - { 5.1077 - if (noise) 5.1078 - phase = 0x200|0xd0; 5.1079 - } 5.1080 - else 5.1081 - /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */ 5.1082 - /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */ 5.1083 - { 5.1084 - if (noise) 5.1085 - phase = 0xd0>>2; 5.1086 - } 5.1087 - 5.1088 - output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2; 5.1089 - } 5.1090 - 5.1091 - /* Snare Drum (verified on real YM3812) */ 5.1092 - env = volume_calc(SLOT7_2); 5.1093 - if( env < ENV_QUIET ) 5.1094 - { 5.1095 - /* base frequency derived from operator 1 in channel 7 */ 5.1096 - unsigned char bit8 = ((SLOT7_1->Cnt>>FREQ_SH)>>8)&1; 5.1097 - 5.1098 - /* when bit8 = 0 phase = 0x100; */ 5.1099 - /* when bit8 = 1 phase = 0x200; */ 5.1100 - UINT32 phase = bit8 ? 0x200 : 0x100; 5.1101 - 5.1102 - /* Noise bit XOR'es phase by 0x100 */ 5.1103 - /* when noisebit = 0 pass the phase from calculation above */ 5.1104 - /* when noisebit = 1 phase ^= 0x100; */ 5.1105 - /* in other words: phase ^= (noisebit<<8); */ 5.1106 - if (noise) 5.1107 - phase ^= 0x100; 5.1108 - 5.1109 - output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2; 5.1110 - } 5.1111 - 5.1112 - /* Tom Tom (verified on real YM3812) */ 5.1113 - env = volume_calc(SLOT8_1); 5.1114 - if( env < ENV_QUIET ) 5.1115 - output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2; 5.1116 - 5.1117 - /* Top Cymbal (verified on real YM3812) */ 5.1118 - env = volume_calc(SLOT8_2); 5.1119 - if( env < ENV_QUIET ) 5.1120 - { 5.1121 - /* base frequency derived from operator 1 in channel 7 */ 5.1122 - unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1; 5.1123 - unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1; 5.1124 - unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1; 5.1125 - 5.1126 - unsigned char res1 = (bit2 ^ bit7) | bit3; 5.1127 - 5.1128 - /* when res1 = 0 phase = 0x000 | 0x100; */ 5.1129 - /* when res1 = 1 phase = 0x200 | 0x100; */ 5.1130 - UINT32 phase = res1 ? 0x300 : 0x100; 5.1131 - 5.1132 - /* enable gate based on frequency of operator 2 in channel 8 */ 5.1133 - unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1; 5.1134 - unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1; 5.1135 - 5.1136 - unsigned char res2 = (bit3e ^ bit5e); 5.1137 - /* when res2 = 0 pass the phase from calculation above (res1); */ 5.1138 - /* when res2 = 1 phase = 0x200 | 0x100; */ 5.1139 - if (res2) 5.1140 - phase = 0x300; 5.1141 - 5.1142 - output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2; 5.1143 - } 5.1144 - 5.1145 -} 5.1146 - 5.1147 - 5.1148 -/* generic table initialize */ 5.1149 -static int init_tables(void) 5.1150 -{ 5.1151 - signed int i,x; 5.1152 - signed int n; 5.1153 - double o,m; 5.1154 - 5.1155 - 5.1156 - for (x=0; x<TL_RES_LEN; x++) 5.1157 - { 5.1158 - m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0); 5.1159 - m = floor(m); 5.1160 - 5.1161 - /* we never reach (1<<16) here due to the (x+1) */ 5.1162 - /* result fits within 16 bits at maximum */ 5.1163 - 5.1164 - n = (int)m; /* 16 bits here */ 5.1165 - n >>= 4; /* 12 bits here */ 5.1166 - if (n&1) /* round to nearest */ 5.1167 - n = (n>>1)+1; 5.1168 - else 5.1169 - n = n>>1; 5.1170 - /* 11 bits here (rounded) */ 5.1171 - n <<= 1; /* 12 bits here (as in real chip) */ 5.1172 - tl_tab[ x*2 + 0 ] = n; 5.1173 - tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ]; 5.1174 - 5.1175 - for (i=1; i<12; i++) 5.1176 - { 5.1177 - tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i; 5.1178 - tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ]; 5.1179 - } 5.1180 - #if 0 5.1181 - logerror("tl %04i", x*2); 5.1182 - for (i=0; i<12; i++) 5.1183 - logerror(", [%02i] %5i", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ] ); 5.1184 - logerror("\n"); 5.1185 - #endif 5.1186 - } 5.1187 - /*logerror("FMOPL.C: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/ 5.1188 - 5.1189 - 5.1190 - for (i=0; i<SIN_LEN; i++) 5.1191 - { 5.1192 - /* non-standard sinus */ 5.1193 - m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* checked against the real chip */ 5.1194 - 5.1195 - /* we never reach zero here due to ((i*2)+1) */ 5.1196 - 5.1197 - if (m>0.0) 5.1198 - o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */ 5.1199 - else 5.1200 - o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */ 5.1201 - 5.1202 - o = o / (ENV_STEP/4); 5.1203 - 5.1204 - n = (int)(2.0*o); 5.1205 - if (n&1) /* round to nearest */ 5.1206 - n = (n>>1)+1; 5.1207 - else 5.1208 - n = n>>1; 5.1209 - 5.1210 - sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 ); 5.1211 - 5.1212 - /*logerror("FMOPL.C: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/ 5.1213 - } 5.1214 - 5.1215 - for (i=0; i<SIN_LEN; i++) 5.1216 - { 5.1217 - /* waveform 1: __ __ */ 5.1218 - /* / \____/ \____*/ 5.1219 - /* output only first half of the sinus waveform (positive one) */ 5.1220 - 5.1221 - if (i & (1<<(SIN_BITS-1)) ) 5.1222 - sin_tab[1*SIN_LEN+i] = TL_TAB_LEN; 5.1223 - else 5.1224 - sin_tab[1*SIN_LEN+i] = sin_tab[i]; 5.1225 - 5.1226 - /* waveform 2: __ __ __ __ */ 5.1227 - /* / \/ \/ \/ \*/ 5.1228 - /* abs(sin) */ 5.1229 - 5.1230 - sin_tab[2*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>1) ]; 5.1231 - 5.1232 - /* waveform 3: _ _ _ _ */ 5.1233 - /* / |_/ |_/ |_/ |_*/ 5.1234 - /* abs(output only first quarter of the sinus waveform) */ 5.1235 - 5.1236 - if (i & (1<<(SIN_BITS-2)) ) 5.1237 - sin_tab[3*SIN_LEN+i] = TL_TAB_LEN; 5.1238 - else 5.1239 - sin_tab[3*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>2)]; 5.1240 - 5.1241 - /*logerror("FMOPL.C: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] ); 5.1242 - logerror("FMOPL.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] ); 5.1243 - logerror("FMOPL.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] );*/ 5.1244 - } 5.1245 - /*logerror("FMOPL.C: ENV_QUIET= %08x (dec*8=%i)\n", ENV_QUIET, ENV_QUIET*8 );*/ 5.1246 - 5.1247 - 5.1248 -#ifdef SAVE_SAMPLE 5.1249 - sample[0]=fopen("sampsum.pcm","wb"); 5.1250 -#endif 5.1251 - 5.1252 - return 1; 5.1253 -} 5.1254 - 5.1255 -static void OPLCloseTable( void ) 5.1256 -{ 5.1257 -#ifdef SAVE_SAMPLE 5.1258 - fclose(sample[0]); 5.1259 -#endif 5.1260 -} 5.1261 - 5.1262 - 5.1263 - 5.1264 -static void OPL_initalize(FM_OPL *OPL) 5.1265 -{ 5.1266 - int i; 5.1267 - 5.1268 - /* frequency base */ 5.1269 - OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / 72.0) / OPL->rate : 0; 5.1270 -#if 0 5.1271 - OPL->rate = (double)OPL->clock / 72.0; 5.1272 - OPL->freqbase = 1.0; 5.1273 -#endif 5.1274 - 5.1275 - /*logerror("freqbase=%f\n", OPL->freqbase);*/ 5.1276 - 5.1277 - /* Timer base time */ 5.1278 - OPL->TimerBase = attotime_mul(ATTOTIME_IN_HZ(OPL->clock), 72); 5.1279 - 5.1280 - /* make fnumber -> increment counter table */ 5.1281 - for( i=0 ; i < 1024 ; i++ ) 5.1282 - { 5.1283 - /* opn phase increment counter = 20bit */ 5.1284 - OPL->fn_tab[i] = (UINT32)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */ 5.1285 -#if 0 5.1286 - logerror("FMOPL.C: fn_tab[%4i] = %08x (dec=%8i)\n", 5.1287 - i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 ); 5.1288 -#endif 5.1289 - } 5.1290 - 5.1291 -#if 0 5.1292 - for( i=0 ; i < 16 ; i++ ) 5.1293 - { 5.1294 - logerror("FMOPL.C: sl_tab[%i] = %08x\n", 5.1295 - i, sl_tab[i] ); 5.1296 - } 5.1297 - for( i=0 ; i < 8 ; i++ ) 5.1298 - { 5.1299 - int j; 5.1300 - logerror("FMOPL.C: ksl_tab[oct=%2i] =",i); 5.1301 - for (j=0; j<16; j++) 5.1302 - { 5.1303 - logerror("%08x ", ksl_tab[i*16+j] ); 5.1304 - } 5.1305 - logerror("\n"); 5.1306 - } 5.1307 -#endif 5.1308 - 5.1309 - 5.1310 - /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */ 5.1311 - /* One entry from LFO_AM_TABLE lasts for 64 samples */ 5.1312 - OPL->lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * OPL->freqbase; 5.1313 - 5.1314 - /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */ 5.1315 - OPL->lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * OPL->freqbase; 5.1316 - 5.1317 - /*logerror ("OPL->lfo_am_inc = %8x ; OPL->lfo_pm_inc = %8x\n", OPL->lfo_am_inc, OPL->lfo_pm_inc);*/ 5.1318 - 5.1319 - /* Noise generator: a step takes 1 sample */ 5.1320 - OPL->noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * OPL->freqbase; 5.1321 - 5.1322 - OPL->eg_timer_add = (1<<EG_SH) * OPL->freqbase; 5.1323 - OPL->eg_timer_overflow = ( 1 ) * (1<<EG_SH); 5.1324 - /*logerror("OPLinit eg_timer_add=%8x eg_timer_overflow=%8x\n", OPL->eg_timer_add, OPL->eg_timer_overflow);*/ 5.1325 - 5.1326 -} 5.1327 - 5.1328 -INLINE void FM_KEYON(OPL_SLOT *SLOT, UINT32 key_set) 5.1329 -{ 5.1330 - if( !SLOT->key ) 5.1331 - { 5.1332 - /* restart Phase Generator */ 5.1333 - SLOT->Cnt = 0; 5.1334 - /* phase -> Attack */ 5.1335 - SLOT->state = EG_ATT; 5.1336 - } 5.1337 - SLOT->key |= key_set; 5.1338 -} 5.1339 - 5.1340 -INLINE void FM_KEYOFF(OPL_SLOT *SLOT, UINT32 key_clr) 5.1341 -{ 5.1342 - if( SLOT->key ) 5.1343 - { 5.1344 - SLOT->key &= key_clr; 5.1345 - 5.1346 - if( !SLOT->key ) 5.1347 - { 5.1348 - /* phase -> Release */ 5.1349 - if (SLOT->state>EG_REL) 5.1350 - SLOT->state = EG_REL; 5.1351 - } 5.1352 - } 5.1353 -} 5.1354 - 5.1355 -/* update phase increment counter of operator (also update the EG rates if necessary) */ 5.1356 -INLINE void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT) 5.1357 -{ 5.1358 - int ksr; 5.1359 - 5.1360 - /* (frequency) phase increment counter */ 5.1361 - SLOT->Incr = CH->fc * SLOT->mul; 5.1362 - ksr = CH->kcode >> SLOT->KSR; 5.1363 - 5.1364 - if( SLOT->ksr != ksr ) 5.1365 - { 5.1366 - SLOT->ksr = ksr; 5.1367 - 5.1368 - /* calculate envelope generator rates */ 5.1369 - if ((SLOT->ar + SLOT->ksr) < 16+62) 5.1370 - { 5.1371 - SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; 5.1372 - SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; 5.1373 - } 5.1374 - else 5.1375 - { 5.1376 - SLOT->eg_sh_ar = 0; 5.1377 - SLOT->eg_sel_ar = 13*RATE_STEPS; 5.1378 - } 5.1379 - SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; 5.1380 - SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; 5.1381 - SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; 5.1382 - SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; 5.1383 - } 5.1384 -} 5.1385 - 5.1386 -/* set multi,am,vib,EG-TYP,KSR,mul */ 5.1387 -INLINE void set_mul(FM_OPL *OPL,int slot,int v) 5.1388 -{ 5.1389 - OPL_CH *CH = &OPL->P_CH[slot/2]; 5.1390 - OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 5.1391 - 5.1392 - SLOT->mul = mul_tab[v&0x0f]; 5.1393 - SLOT->KSR = (v&0x10) ? 0 : 2; 5.1394 - SLOT->eg_type = (v&0x20); 5.1395 - SLOT->vib = (v&0x40); 5.1396 - SLOT->AMmask = (v&0x80) ? ~0 : 0; 5.1397 - CALC_FCSLOT(CH,SLOT); 5.1398 -} 5.1399 - 5.1400 -/* set ksl & tl */ 5.1401 -INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v) 5.1402 -{ 5.1403 - OPL_CH *CH = &OPL->P_CH[slot/2]; 5.1404 - OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 5.1405 - int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */ 5.1406 - 5.1407 - SLOT->ksl = ksl ? 3-ksl : 31; 5.1408 - SLOT->TL = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */ 5.1409 - 5.1410 - SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 5.1411 -} 5.1412 - 5.1413 -/* set attack rate & decay rate */ 5.1414 -INLINE void set_ar_dr(FM_OPL *OPL,int slot,int v) 5.1415 -{ 5.1416 - OPL_CH *CH = &OPL->P_CH[slot/2]; 5.1417 - OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 5.1418 - 5.1419 - SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0; 5.1420 - 5.1421 - if ((SLOT->ar + SLOT->ksr) < 16+62) 5.1422 - { 5.1423 - SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; 5.1424 - SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; 5.1425 - } 5.1426 - else 5.1427 - { 5.1428 - SLOT->eg_sh_ar = 0; 5.1429 - SLOT->eg_sel_ar = 13*RATE_STEPS; 5.1430 - } 5.1431 - 5.1432 - SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0; 5.1433 - SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; 5.1434 - SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; 5.1435 -} 5.1436 - 5.1437 -/* set sustain level & release rate */ 5.1438 -INLINE void set_sl_rr(FM_OPL *OPL,int slot,int v) 5.1439 -{ 5.1440 - OPL_CH *CH = &OPL->P_CH[slot/2]; 5.1441 - OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 5.1442 - 5.1443 - SLOT->sl = sl_tab[ v>>4 ]; 5.1444 - 5.1445 - SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0; 5.1446 - SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; 5.1447 - SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; 5.1448 -} 5.1449 - 5.1450 - 5.1451 -/* write a value v to register r on OPL chip */ 5.1452 -static void OPLWriteReg(FM_OPL *OPL, int r, int v) 5.1453 -{ 5.1454 - OPL_CH *CH; 5.1455 - int slot; 5.1456 - int block_fnum; 5.1457 - 5.1458 - 5.1459 - /* adjust bus to 8 bits */ 5.1460 - r &= 0xff; 5.1461 - v &= 0xff; 5.1462 - 5.1463 - if (LOG_CYM_FILE && (cymfile) && (r!=0) ) 5.1464 - { 5.1465 - fputc( (unsigned char)r, cymfile ); 5.1466 - fputc( (unsigned char)v, cymfile ); 5.1467 - } 5.1468 - 5.1469 - 5.1470 - switch(r&0xe0) 5.1471 - { 5.1472 - case 0x00: /* 00-1f:control */ 5.1473 - switch(r&0x1f) 5.1474 - { 5.1475 - case 0x01: /* waveform select enable */ 5.1476 - if(OPL->type&OPL_TYPE_WAVESEL) 5.1477 - { 5.1478 - OPL->wavesel = v&0x20; 5.1479 - /* do not change the waveform previously selected */ 5.1480 - } 5.1481 - break; 5.1482 - case 0x02: /* Timer 1 */ 5.1483 - OPL->T[0] = (256-v)*4; 5.1484 - break; 5.1485 - case 0x03: /* Timer 2 */ 5.1486 - OPL->T[1] = (256-v)*16; 5.1487 - break; 5.1488 - case 0x04: /* IRQ clear / mask and Timer enable */ 5.1489 - if(v&0x80) 5.1490 - { /* IRQ flag clear */ 5.1491 - OPL_STATUS_RESET(OPL,0x7f-0x08); /* don't reset BFRDY flag or we will have to call deltat module to set the flag */ 5.1492 - } 5.1493 - else 5.1494 - { /* set IRQ mask ,timer enable*/ 5.1495 - UINT8 st1 = v&1; 5.1496 - UINT8 st2 = (v>>1)&1; 5.1497 - 5.1498 - /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */ 5.1499 - OPL_STATUS_RESET(OPL, v & (0x78-0x08) ); 5.1500 - OPL_STATUSMASK_SET(OPL, (~v) & 0x78 ); 5.1501 - 5.1502 - /* timer 2 */ 5.1503 - if(OPL->st[1] != st2) 5.1504 - { 5.1505 - attotime period = st2 ? attotime_mul(OPL->TimerBase, OPL->T[1]) : attotime_zero; 5.1506 - OPL->st[1] = st2; 5.1507 - if (OPL->timer_handler) (OPL->timer_handler)(OPL->TimerParam,1,period); 5.1508 - } 5.1509 - /* timer 1 */ 5.1510 - if(OPL->st[0] != st1) 5.1511 - { 5.1512 - attotime period = st1 ? attotime_mul(OPL->TimerBase, OPL->T[0]) : attotime_zero; 5.1513 - OPL->st[0] = st1; 5.1514 - if (OPL->timer_handler) (OPL->timer_handler)(OPL->TimerParam,0,period); 5.1515 - } 5.1516 - } 5.1517 - break; 5.1518 -#if BUILD_Y8950 5.1519 - case 0x06: /* Key Board OUT */ 5.1520 - if(OPL->type&OPL_TYPE_KEYBOARD) 5.1521 - { 5.1522 - if(OPL->keyboardhandler_w) 5.1523 - OPL->keyboardhandler_w(OPL->keyboard_param,v); 5.1524 - else 5.1525 - logerror("Y8950: write unmapped KEYBOARD port\n"); 5.1526 - } 5.1527 - break; 5.1528 - case 0x07: /* DELTA-T control 1 : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */ 5.1529 - if(OPL->type&OPL_TYPE_ADPCM) 5.1530 - YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v); 5.1531 - break; 5.1532 -#endif 5.1533 - case 0x08: /* MODE,DELTA-T control 2 : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */ 5.1534 - OPL->mode = v; 5.1535 -#if BUILD_Y8950 5.1536 - if(OPL->type&OPL_TYPE_ADPCM) 5.1537 - YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v&0x0f); /* mask 4 LSBs in register 08 for DELTA-T unit */ 5.1538 -#endif 5.1539 - break; 5.1540 - 5.1541 -#if BUILD_Y8950 5.1542 - case 0x09: /* START ADD */ 5.1543 - case 0x0a: 5.1544 - case 0x0b: /* STOP ADD */ 5.1545 - case 0x0c: 5.1546 - case 0x0d: /* PRESCALE */ 5.1547 - case 0x0e: 5.1548 - case 0x0f: /* ADPCM data write */ 5.1549 - case 0x10: /* DELTA-N */ 5.1550 - case 0x11: /* DELTA-N */ 5.1551 - case 0x12: /* ADPCM volume */ 5.1552 - if(OPL->type&OPL_TYPE_ADPCM) 5.1553 - YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v); 5.1554 - break; 5.1555 - 5.1556 - case 0x15: /* DAC data high 8 bits (F7,F6...F2) */ 5.1557 - case 0x16: /* DAC data low 2 bits (F1, F0 in bits 7,6) */ 5.1558 - case 0x17: /* DAC data shift (S2,S1,S0 in bits 2,1,0) */ 5.1559 - logerror("FMOPL.C: DAC data register written, but not implemented reg=%02x val=%02x\n",r,v); 5.1560 - break; 5.1561 - 5.1562 - case 0x18: /* I/O CTRL (Direction) */ 5.1563 - if(OPL->type&OPL_TYPE_IO) 5.1564 - OPL->portDirection = v&0x0f; 5.1565 - break; 5.1566 - case 0x19: /* I/O DATA */ 5.1567 - if(OPL->type&OPL_TYPE_IO) 5.1568 - { 5.1569 - OPL->portLatch = v; 5.1570 - if(OPL->porthandler_w) 5.1571 - OPL->porthandler_w(OPL->port_param,v&OPL->portDirection); 5.1572 - } 5.1573 - break; 5.1574 -#endif 5.1575 - default: 5.1576 - pclog("FMOPL.C: write to unknown register: %02x\n",r); 5.1577 - break; 5.1578 - } 5.1579 - break; 5.1580 - case 0x20: /* am ON, vib ON, ksr, eg_type, mul */ 5.1581 - slot = slot_array[r&0x1f]; 5.1582 - if(slot < 0) return; 5.1583 - set_mul(OPL,slot,v); 5.1584 - break; 5.1585 - case 0x40: 5.1586 - slot = slot_array[r&0x1f]; 5.1587 - if(slot < 0) return; 5.1588 - set_ksl_tl(OPL,slot,v); 5.1589 - break; 5.1590 - case 0x60: 5.1591 - slot = slot_array[r&0x1f]; 5.1592 - if(slot < 0) return; 5.1593 - set_ar_dr(OPL,slot,v); 5.1594 - break; 5.1595 - case 0x80: 5.1596 - slot = slot_array[r&0x1f]; 5.1597 - if(slot < 0) return; 5.1598 - set_sl_rr(OPL,slot,v); 5.1599 - break; 5.1600 - case 0xa0: 5.1601 - if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */ 5.1602 - { 5.1603 - OPL->lfo_am_depth = v & 0x80; 5.1604 - OPL->lfo_pm_depth_range = (v&0x40) ? 8 : 0; 5.1605 - 5.1606 - OPL->rhythm = v&0x3f; 5.1607 - 5.1608 - if(OPL->rhythm&0x20) 5.1609 - { 5.1610 - /* BD key on/off */ 5.1611 - if(v&0x10) 5.1612 - { 5.1613 - FM_KEYON (&OPL->P_CH[6].SLOT[SLOT1], 2); 5.1614 - FM_KEYON (&OPL->P_CH[6].SLOT[SLOT2], 2); 5.1615 - } 5.1616 - else 5.1617 - { 5.1618 - FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1],~2); 5.1619 - FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2],~2); 5.1620 - } 5.1621 - /* HH key on/off */ 5.1622 - if(v&0x01) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT1], 2); 5.1623 - else FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1],~2); 5.1624 - /* SD key on/off */ 5.1625 - if(v&0x08) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT2], 2); 5.1626 - else FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2],~2); 5.1627 - /* TOM key on/off */ 5.1628 - if(v&0x04) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT1], 2); 5.1629 - else FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1],~2); 5.1630 - /* TOP-CY key on/off */ 5.1631 - if(v&0x02) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT2], 2); 5.1632 - else FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2],~2); 5.1633 - } 5.1634 - else 5.1635 - { 5.1636 - /* BD key off */ 5.1637 - FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1],~2); 5.1638 - FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2],~2); 5.1639 - /* HH key off */ 5.1640 - FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1],~2); 5.1641 - /* SD key off */ 5.1642 - FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2],~2); 5.1643 - /* TOM key off */ 5.1644 - FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1],~2); 5.1645 - /* TOP-CY off */ 5.1646 - FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2],~2); 5.1647 - } 5.1648 - return; 5.1649 - } 5.1650 - /* keyon,block,fnum */ 5.1651 - if( (r&0x0f) > 8) return; 5.1652 - CH = &OPL->P_CH[r&0x0f]; 5.1653 - if(!(r&0x10)) 5.1654 - { /* a0-a8 */ 5.1655 - block_fnum = (CH->block_fnum&0x1f00) | v; 5.1656 - } 5.1657 - else 5.1658 - { /* b0-b8 */ 5.1659 - block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff); 5.1660 - 5.1661 - if(v&0x20) 5.1662 - { 5.1663 - FM_KEYON (&CH->SLOT[SLOT1], 1); 5.1664 - FM_KEYON (&CH->SLOT[SLOT2], 1); 5.1665 - } 5.1666 - else 5.1667 - { 5.1668 - FM_KEYOFF(&CH->SLOT[SLOT1],~1); 5.1669 - FM_KEYOFF(&CH->SLOT[SLOT2],~1); 5.1670 - } 5.1671 - } 5.1672 - /* update */ 5.1673 - if(CH->block_fnum != block_fnum) 5.1674 - { 5.1675 - UINT8 block = block_fnum >> 10; 5.1676 - 5.1677 - CH->block_fnum = block_fnum; 5.1678 - 5.1679 - CH->ksl_base = ksl_tab[block_fnum>>6]; 5.1680 - CH->fc = OPL->fn_tab[block_fnum&0x03ff] >> (7-block); 5.1681 - 5.1682 - /* BLK 2,1,0 bits -> bits 3,2,1 of kcode */ 5.1683 - CH->kcode = (CH->block_fnum&0x1c00)>>9; 5.1684 - 5.1685 - /* the info below is actually opposite to what is stated in the Manuals (verifed on real YM3812) */ 5.1686 - /* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum */ 5.1687 - /* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */ 5.1688 - if (OPL->mode&0x40) 5.1689 - CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */ 5.1690 - else 5.1691 - CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */ 5.1692 - 5.1693 - /* refresh Total Level in both SLOTs of this channel */ 5.1694 - CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); 5.1695 - CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); 5.1696 - 5.1697 - /* refresh frequency counter in both SLOTs of this channel */ 5.1698 - CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 5.1699 - CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 5.1700 - } 5.1701 - break; 5.1702 - case 0xc0: 5.1703 - /* FB,C */ 5.1704 - if( (r&0x0f) > 8) return; 5.1705 - CH = &OPL->P_CH[r&0x0f]; 5.1706 - CH->SLOT[SLOT1].FB = (v>>1)&7 ? ((v>>1)&7) + 7 : 0; 5.1707 - CH->SLOT[SLOT1].CON = v&1; 5.1708 - CH->SLOT[SLOT1].connect1 = CH->SLOT[SLOT1].CON ? &output[0] : &phase_modulation; 5.1709 - break; 5.1710 - case 0xe0: /* waveform select */ 5.1711 - /* simply ignore write to the waveform select register if selecting not enabled in test register */ 5.1712 - if(OPL->wavesel) 5.1713 - { 5.1714 - slot = slot_array[r&0x1f]; 5.1715 - if(slot < 0) return; 5.1716 - CH = &OPL->P_CH[slot/2]; 5.1717 - 5.1718 - CH->SLOT[slot&1].wavetable = (v&0x03)*SIN_LEN; 5.1719 - } 5.1720 - break; 5.1721 - } 5.1722 -} 5.1723 - 5.1724 -static TIMER_CALLBACK( cymfile_callback ) 5.1725 -{ 5.1726 - if (cymfile) 5.1727 - { 5.1728 - fputc( (unsigned char)0, cymfile ); 5.1729 - } 5.1730 -} 5.1731 - 5.1732 -/* lock/unlock for common table */ 5.1733 -static int OPL_LockTable(running_device *device) 5.1734 -{ 5.1735 - num_lock++; 5.1736 - if(num_lock>1) return 0; 5.1737 - 5.1738 - /* first time */ 5.1739 - 5.1740 - cur_chip = NULL; 5.1741 - /* allocate total level table (128kb space) */ 5.1742 - if( !init_tables() ) 5.1743 - { 5.1744 - num_lock--; 5.1745 - return -1; 5.1746 - } 5.1747 - 5.1748 - #if 0 5.1749 - if (LOG_CYM_FILE) 5.1750 - { 5.1751 - cymfile = fopen("3812_.cym","wb"); 5.1752 - if (cymfile) 5.1753 - timer_pulse ( device->machine, ATTOTIME_IN_HZ(110), NULL, 0, cymfile_callback); /*110 Hz pulse timer*/ 5.1754 - else 5.1755 - logerror("Could not create file 3812_.cym\n"); 5.1756 - } 5.1757 - #endif 5.1758 - return 0; 5.1759 -} 5.1760 - 5.1761 -static void OPL_UnLockTable(void) 5.1762 -{ 5.1763 - if(num_lock) num_lock--; 5.1764 - if(num_lock) return; 5.1765 - 5.1766 - /* last time */ 5.1767 - 5.1768 - cur_chip = NULL; 5.1769 - OPLCloseTable(); 5.1770 - #if 0 5.1771 - if (cymfile) 5.1772 - fclose (cymfile); 5.1773 - cymfile = NULL; 5.1774 - #endif 5.1775 -} 5.1776 - 5.1777 -static void OPLResetChip(FM_OPL *OPL) 5.1778 -{ 5.1779 - int c,s; 5.1780 - int i; 5.1781 - 5.1782 - OPL->eg_timer = 0; 5.1783 - OPL->eg_cnt = 0; 5.1784 - 5.1785 - OPL->noise_rng = 1; /* noise shift register */ 5.1786 - OPL->mode = 0; /* normal mode */ 5.1787 - OPL_STATUS_RESET(OPL,0x7f); 5.1788 - 5.1789 - /* reset with register write */ 5.1790 - OPLWriteReg(OPL,0x01,0); /* wavesel disable */ 5.1791 - OPLWriteReg(OPL,0x02,0); /* Timer1 */ 5.1792 - OPLWriteReg(OPL,0x03,0); /* Timer2 */ 5.1793 - OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */ 5.1794 - for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0); 5.1795 - 5.1796 - /* reset operator parameters */ 5.1797 - for( c = 0 ; c < 9 ; c++ ) 5.1798 - { 5.1799 - OPL_CH *CH = &OPL->P_CH[c]; 5.1800 - for(s = 0 ; s < 2 ; s++ ) 5.1801 - { 5.1802 - /* wave table */ 5.1803 - CH->SLOT[s].wavetable = 0; 5.1804 - CH->SLOT[s].state = EG_OFF; 5.1805 - CH->SLOT[s].volume = MAX_ATT_INDEX; 5.1806 - } 5.1807 - } 5.1808 -#if BUILD_Y8950 5.1809 - if(OPL->type&OPL_TYPE_ADPCM) 5.1810 - { 5.1811 - YM_DELTAT *DELTAT = OPL->deltat; 5.1812 - 5.1813 - DELTAT->freqbase = OPL->freqbase; 5.1814 - DELTAT->output_pointer = &output_deltat[0]; 5.1815 - DELTAT->portshift = 5; 5.1816 - DELTAT->output_range = 1<<23; 5.1817 - YM_DELTAT_ADPCM_Reset(DELTAT,0,YM_DELTAT_EMULATION_MODE_NORMAL); 5.1818 - } 5.1819 -#endif 5.1820 -} 5.1821 - 5.1822 -#if 0 5.1823 -static STATE_POSTLOAD( OPL_postload ) 5.1824 -{ 5.1825 - FM_OPL *OPL = (FM_OPL *)param; 5.1826 - int slot, ch; 5.1827 - 5.1828 - for( ch=0 ; ch < 9 ; ch++ ) 5.1829 - { 5.1830 - OPL_CH *CH = &OPL->P_CH[ch]; 5.1831 - 5.1832 - /* Look up key scale level */ 5.1833 - UINT32 block_fnum = CH->block_fnum; 5.1834 - CH->ksl_base = ksl_tab[block_fnum >> 6]; 5.1835 - CH->fc = OPL->fn_tab[block_fnum & 0x03ff] >> (7 - (block_fnum >> 10)); 5.1836 - 5.1837 - for( slot=0 ; slot < 2 ; slot++ ) 5.1838 - { 5.1839 - OPL_SLOT *SLOT = &CH->SLOT[slot]; 5.1840 - 5.1841 - /* Calculate key scale rate */ 5.1842 - SLOT->ksr = CH->kcode >> SLOT->KSR; 5.1843 - 5.1844 - /* Calculate attack, decay and release rates */ 5.1845 - if ((SLOT->ar + SLOT->ksr) < 16+62) 5.1846 - { 5.1847 - SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; 5.1848 - SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; 5.1849 - } 5.1850 - else 5.1851 - { 5.1852 - SLOT->eg_sh_ar = 0; 5.1853 - SLOT->eg_sel_ar = 13*RATE_STEPS; 5.1854 - } 5.1855 - SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; 5.1856 - SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; 5.1857 - SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; 5.1858 - SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; 5.1859 - 5.1860 - /* Calculate phase increment */ 5.1861 - SLOT->Incr = CH->fc * SLOT->mul; 5.1862 - 5.1863 - /* Total level */ 5.1864 - SLOT->TLL = SLOT->TL + (CH->ksl_base >> SLOT->ksl); 5.1865 - 5.1866 - /* Connect output */ 5.1867 - SLOT->connect1 = SLOT->CON ? &output[0] : &phase_modulation; 5.1868 - } 5.1869 - } 5.1870 -#if BUILD_Y8950 5.1871 - if ( (OPL->type & OPL_TYPE_ADPCM) && (OPL->deltat) ) 5.1872 - { 5.1873 - // We really should call the postlod function for the YM_DELTAT, but it's hard without registers 5.1874 - // (see the way the YM2610 does it) 5.1875 - //YM_DELTAT_postload(OPL->deltat, REGS); 5.1876 - } 5.1877 -#endif 5.1878 -} 5.1879 - 5.1880 - 5.1881 -static void OPLsave_state_channel(running_device *device, OPL_CH *CH) 5.1882 -{ 5.1883 - int slot, ch; 5.1884 - 5.1885 - for( ch=0 ; ch < 9 ; ch++, CH++ ) 5.1886 - { 5.1887 - /* channel */ 5.1888 - state_save_register_device_item(device, ch, CH->block_fnum); 5.1889 - state_save_register_device_item(device, ch, CH->kcode); 5.1890 - /* slots */ 5.1891 - for( slot=0 ; slot < 2 ; slot++ ) 5.1892 - { 5.1893 - OPL_SLOT *SLOT = &CH->SLOT[slot]; 5.1894 - 5.1895 - state_save_register_device_item(device, ch * 2 + slot, SLOT->ar); 5.1896 - state_save_register_device_item(device, ch * 2 + slot, SLOT->dr); 5.1897 - state_save_register_device_item(device, ch * 2 + slot, SLOT->rr); 5.1898 - state_save_register_device_item(device, ch * 2 + slot, SLOT->KSR); 5.1899 - state_save_register_device_item(device, ch * 2 + slot, SLOT->ksl); 5.1900 - state_save_register_device_item(device, ch * 2 + slot, SLOT->mul); 5.1901 - 5.1902 - state_save_register_device_item(device, ch * 2 + slot, SLOT->Cnt); 5.1903 - state_save_register_device_item(device, ch * 2 + slot, SLOT->FB); 5.1904 - state_save_register_device_item_array(device, ch * 2 + slot, SLOT->op1_out); 5.1905 - state_save_register_device_item(device, ch * 2 + slot, SLOT->CON); 5.1906 - 5.1907 - state_save_register_device_item(device, ch * 2 + slot, SLOT->eg_type); 5.1908 - state_save_register_device_item(device, ch * 2 + slot, SLOT->state); 5.1909 - state_save_register_device_item(device, ch * 2 + slot, SLOT->TL); 5.1910 - state_save_register_device_item(device, ch * 2 + slot, SLOT->volume); 5.1911 - state_save_register_device_item(device, ch * 2 + slot, SLOT->sl); 5.1912 - state_save_register_device_item(device, ch * 2 + slot, SLOT->key); 5.1913 - 5.1914 - state_save_register_device_item(device, ch * 2 + slot, SLOT->AMmask); 5.1915 - state_save_register_device_item(device, ch * 2 + slot, SLOT->vib); 5.1916 - 5.1917 - state_save_register_device_item(device, ch * 2 + slot, SLOT->wavetable); 5.1918 - } 5.1919 - } 5.1920 -} 5.1921 - 5.1922 - 5.1923 -/* Register savestate for a virtual YM3812/YM3526Y8950 */ 5.1924 - 5.1925 -static void OPL_save_state(FM_OPL *OPL, running_device *device) 5.1926 -{ 5.1927 - OPLsave_state_channel(device, OPL->P_CH); 5.1928 - 5.1929 - state_save_register_device_item(device, 0, OPL->eg_cnt); 5.1930 - state_save_register_device_item(device, 0, OPL->eg_timer); 5.1931 - 5.1932 - state_save_register_device_item(device, 0, OPL->rhythm); 5.1933 - 5.1934 - state_save_register_device_item(device, 0, OPL->lfo_am_depth); 5.1935 - state_save_register_device_item(device, 0, OPL->lfo_pm_depth_range); 5.1936 - state_save_register_device_item(device, 0, OPL->lfo_am_cnt); 5.1937 - state_save_register_device_item(device, 0, OPL->lfo_pm_cnt); 5.1938 - 5.1939 - state_save_register_device_item(device, 0, OPL->noise_rng); 5.1940 - state_save_register_device_item(device, 0, OPL->noise_p); 5.1941 - 5.1942 - if( OPL->type & OPL_TYPE_WAVESEL ) 5.1943 - { 5.1944 - state_save_register_device_item(device, 0, OPL->wavesel); 5.1945 - } 5.1946 - 5.1947 - state_save_register_device_item_array(device, 0, OPL->T); 5.1948 - state_save_register_device_item_array(device, 0, OPL->st); 5.1949 - 5.1950 -#if BUILD_Y8950 5.1951 - if ( (OPL->type & OPL_TYPE_ADPCM) && (OPL->deltat) ) 5.1952 - { 5.1953 - YM_DELTAT_savestate(device, OPL->deltat); 5.1954 - } 5.1955 - 5.1956 - if ( OPL->type & OPL_TYPE_IO ) 5.1957 - { 5.1958 - state_save_register_device_item(device, 0, OPL->portDirection); 5.1959 - state_save_register_device_item(device, 0, OPL->portLatch); 5.1960 - } 5.1961 -#endif 5.1962 - 5.1963 - state_save_register_device_item(device, 0, OPL->address); 5.1964 - state_save_register_device_item(device, 0, OPL->status); 5.1965 - state_save_register_device_item(device, 0, OPL->statusmask); 5.1966 - state_save_register_device_item(device, 0, OPL->mode); 5.1967 - 5.1968 - state_save_register_postload(device->machine, OPL_postload, OPL); 5.1969 -} 5.1970 -#endif 5.1971 - 5.1972 -/* Create one of virtual YM3812/YM3526/Y8950 */ 5.1973 -/* 'clock' is chip clock in Hz */ 5.1974 -/* 'rate' is sampling rate */ 5.1975 -static FM_OPL *OPLCreate(running_device *device, UINT32 clock, UINT32 rate, int type) 5.1976 -{ 5.1977 - char *ptr; 5.1978 - FM_OPL *OPL; 5.1979 - int state_size; 5.1980 - 5.1981 - if (OPL_LockTable(device) == -1) return NULL; 5.1982 - 5.1983 - /* calculate OPL state size */ 5.1984 - state_size = sizeof(FM_OPL); 5.1985 - 5.1986 -#if BUILD_Y8950 5.1987 - if (type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT); 5.1988 -#endif 5.1989 - 5.1990 - /* allocate memory block */ 5.1991 - ptr = (char *)malloc(state_size); //auto_alloc_array_clear(device->machine, UINT8, state_size); 5.1992 - memset(ptr,0,state_size); 5.1993 - OPL = (FM_OPL *)ptr; 5.1994 - 5.1995 - ptr += sizeof(FM_OPL); 5.1996 - 5.1997 -#if BUILD_Y8950 5.1998 - if (type&OPL_TYPE_ADPCM) 5.1999 - { 5.2000 - OPL->deltat = (YM_DELTAT *)ptr; 5.2001 - } 5.2002 - ptr += sizeof(YM_DELTAT); 5.2003 -#endif 5.2004 - 5.2005 - OPL->device = device; 5.2006 - OPL->type = type; 5.2007 - OPL->clock = clock; 5.2008 - OPL->rate = rate; 5.2009 - 5.2010 - /* init global tables */ 5.2011 - OPL_initalize(OPL); 5.2012 - 5.2013 - return OPL; 5.2014 -} 5.2015 - 5.2016 -/* Destroy one of virtual YM3812 */ 5.2017 -static void OPLDestroy(FM_OPL *OPL) 5.2018 -{ 5.2019 - OPL_UnLockTable(); 5.2020 - free(OPL); 5.2021 -// auto_free(OPL->device->machine, OPL); 5.2022 -} 5.2023 - 5.2024 -/* Optional handlers */ 5.2025 - 5.2026 -static void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER timer_handler,void *param) 5.2027 -{ 5.2028 - OPL->timer_handler = timer_handler; 5.2029 - OPL->TimerParam = param; 5.2030 -} 5.2031 -static void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,void *param) 5.2032 -{ 5.2033 - OPL->IRQHandler = IRQHandler; 5.2034 - OPL->IRQParam = param; 5.2035 -} 5.2036 -static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,void *param) 5.2037 -{ 5.2038 - OPL->UpdateHandler = UpdateHandler; 5.2039 - OPL->UpdateParam = param; 5.2040 -} 5.2041 - 5.2042 -static int OPLWrite(FM_OPL *OPL,int a,int v) 5.2043 -{ 5.2044 - if( !(a&1) ) 5.2045 - { /* address port */ 5.2046 - OPL->address = v & 0xff; 5.2047 - } 5.2048 - else 5.2049 - { /* data port */ 5.2050 - if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0); 5.2051 - OPLWriteReg(OPL,OPL->address,v); 5.2052 - } 5.2053 - return OPL->status>>7; 5.2054 -} 5.2055 - 5.2056 -static unsigned char OPLRead(FM_OPL *OPL,int a) 5.2057 -{ 5.2058 - if( !(a&1) ) 5.2059 - { 5.2060 - /* status port */ 5.2061 - 5.2062 - #if BUILD_Y8950 5.2063 - 5.2064 - if(OPL->type&OPL_TYPE_ADPCM) /* Y8950 */ 5.2065 - { 5.2066 - return (OPL->status & (OPL->statusmask|0x80)) | (OPL->deltat->PCM_BSY&1); 5.2067 - } 5.2068 - 5.2069 - #endif 5.2070 - 5.2071 - /* OPL and OPL2 */ 5.2072 - return OPL->status & (OPL->statusmask|0x80); 5.2073 - } 5.2074 - 5.2075 -#if BUILD_Y8950 5.2076 - /* data port */ 5.2077 - switch(OPL->address) 5.2078 - { 5.2079 - case 0x05: /* KeyBoard IN */ 5.2080 - if(OPL->type&OPL_TYPE_KEYBOARD) 5.2081 - { 5.2082 - if(OPL->keyboardhandler_r) 5.2083 - return OPL->keyboardhandler_r(OPL->keyboard_param); 5.2084 - else 5.2085 - logerror("Y8950: read unmapped KEYBOARD port\n"); 5.2086 - } 5.2087 - return 0; 5.2088 - 5.2089 - case 0x0f: /* ADPCM-DATA */ 5.2090 - if(OPL->type&OPL_TYPE_ADPCM) 5.2091 - { 5.2092 - UINT8 val; 5.2093 - 5.2094 - val = YM_DELTAT_ADPCM_Read(OPL->deltat); 5.2095 - /*logerror("Y8950: read ADPCM value read=%02x\n",val);*/ 5.2096 - return val; 5.2097 - } 5.2098 - return 0; 5.2099 - 5.2100 - case 0x19: /* I/O DATA */ 5.2101 - if(OPL->type&OPL_TYPE_IO) 5.2102 - { 5.2103 - if(OPL->porthandler_r) 5.2104 - return OPL->porthandler_r(OPL->port_param); 5.2105 - else 5.2106 - logerror("Y8950:read unmapped I/O port\n"); 5.2107 - } 5.2108 - return 0; 5.2109 - case 0x1a: /* PCM-DATA */ 5.2110 - if(OPL->type&OPL_TYPE_ADPCM) 5.2111 - { 5.2112 - logerror("Y8950 A/D convertion is accessed but not implemented !\n"); 5.2113 - return 0x80; /* 2's complement PCM data - result from A/D convertion */ 5.2114 - } 5.2115 - return 0; 5.2116 - } 5.2117 -#endif 5.2118 - 5.2119 - return 0xff; 5.2120 -} 5.2121 - 5.2122 -/* CSM Key Controll */ 5.2123 -INLINE void CSMKeyControll(OPL_CH *CH) 5.2124 -{ 5.2125 - FM_KEYON (&CH->SLOT[SLOT1], 4); 5.2126 - FM_KEYON (&CH->SLOT[SLOT2], 4); 5.2127 - 5.2128 - /* The key off should happen exactly one sample later - not implemented correctly yet */ 5.2129 - 5.2130 - FM_KEYOFF(&CH->SLOT[SLOT1], ~4); 5.2131 - FM_KEYOFF(&CH->SLOT[SLOT2], ~4); 5.2132 -} 5.2133 - 5.2134 - 5.2135 -static int OPLTimerOver(FM_OPL *OPL,int c) 5.2136 -{ 5.2137 - if( c ) 5.2138 - { /* Timer B */ 5.2139 - OPL_STATUS_SET(OPL,0x20); 5.2140 - } 5.2141 - else 5.2142 - { /* Timer A */ 5.2143 - OPL_STATUS_SET(OPL,0x40); 5.2144 - /* CSM mode key,TL controll */ 5.2145 - if( OPL->mode & 0x80 ) 5.2146 - { /* CSM mode total level latch and auto key on */ 5.2147 - int ch; 5.2148 - if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0); 5.2149 - for(ch=0; ch<9; ch++) 5.2150 - CSMKeyControll( &OPL->P_CH[ch] ); 5.2151 - } 5.2152 - } 5.2153 - /* reload timer */ 5.2154 - if (OPL->timer_handler) (OPL->timer_handler)(OPL->TimerParam,c,attotime_mul(OPL->TimerBase, OPL->T[c])); 5.2155 - return OPL->status>>7; 5.2156 -} 5.2157 - 5.2158 - 5.2159 -#define MAX_OPL_CHIPS 2 5.2160 - 5.2161 - 5.2162 -#if (BUILD_YM3812) 5.2163 - 5.2164 -void * ym3812_init(running_device *device, UINT32 clock, UINT32 rate) 5.2165 -{ 5.2166 - /* emulator create */ 5.2167 - FM_OPL *YM3812 = OPLCreate(device,clock,rate,OPL_TYPE_YM3812); 5.2168 - if (YM3812) 5.2169 - { 5.2170 -// OPL_save_state(YM3812, device); 5.2171 - ym3812_reset_chip(YM3812); 5.2172 - } 5.2173 - return YM3812; 5.2174 -} 5.2175 - 5.2176 -void ym3812_shutdown(void *chip) 5.2177 -{ 5.2178 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2179 - 5.2180 - /* emulator shutdown */ 5.2181 - OPLDestroy(YM3812); 5.2182 -} 5.2183 -void ym3812_reset_chip(void *chip) 5.2184 -{ 5.2185 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2186 - OPLResetChip(YM3812); 5.2187 -} 5.2188 - 5.2189 -int ym3812_write(void *chip, int a, int v) 5.2190 -{ 5.2191 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2192 - return OPLWrite(YM3812, a, v); 5.2193 -} 5.2194 - 5.2195 -unsigned char ym3812_read(void *chip, int a) 5.2196 -{ 5.2197 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2198 - /* YM3812 always returns bit2 and bit1 in HIGH state */ 5.2199 - return OPLRead(YM3812, a) | 0x06 ; 5.2200 -} 5.2201 -int ym3812_timer_over(void *chip, int c) 5.2202 -{ 5.2203 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2204 - return OPLTimerOver(YM3812, c); 5.2205 -} 5.2206 - 5.2207 -void ym3812_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, void *param) 5.2208 -{ 5.2209 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2210 - OPLSetTimerHandler(YM3812, timer_handler, param); 5.2211 -} 5.2212 -void ym3812_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,void *param) 5.2213 -{ 5.2214 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2215 - OPLSetIRQHandler(YM3812, IRQHandler, param); 5.2216 -} 5.2217 -void ym3812_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param) 5.2218 -{ 5.2219 - FM_OPL *YM3812 = (FM_OPL *)chip; 5.2220 - OPLSetUpdateHandler(YM3812, UpdateHandler, param); 5.2221 -} 5.2222 - 5.2223 - 5.2224 -/* 5.2225 -** Generate samples for one of the YM3812's 5.2226 -** 5.2227 -** 'which' is the virtual YM3812 number 5.2228 -** '*buffer' is the output buffer pointer 5.2229 -** 'length' is the number of samples that should be generated 5.2230 -*/ 5.2231 -void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length) 5.2232 -{ 5.2233 - FM_OPL *OPL = (FM_OPL *)chip; 5.2234 - UINT8 rhythm = OPL->rhythm&0x20; 5.2235 - OPLSAMPLE *buf = buffer; 5.2236 - int i; 5.2237 - 5.2238 - if( (void *)OPL != cur_chip ){ 5.2239 - cur_chip = (void *)OPL; 5.2240 - /* rhythm slots */ 5.2241 - SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1]; 5.2242 - SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2]; 5.2243 - SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1]; 5.2244 - SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2]; 5.2245 - } 5.2246 - for( i=0; i < length ; i++ ) 5.2247 - { 5.2248 - int lt; 5.2249 - 5.2250 - output[0] = 0; 5.2251 - 5.2252 - advance_lfo(OPL); 5.2253 - 5.2254 - /* FM part */ 5.2255 - OPL_CALC_CH(&OPL->P_CH[0]); 5.2256 - OPL_CALC_CH(&OPL->P_CH[1]); 5.2257 - OPL_CALC_CH(&OPL->P_CH[2]); 5.2258 - OPL_CALC_CH(&OPL->P_CH[3]); 5.2259 - OPL_CALC_CH(&OPL->P_CH[4]); 5.2260 - OPL_CALC_CH(&OPL->P_CH[5]); 5.2261 - 5.2262 - if(!rhythm) 5.2263 - { 5.2264 - OPL_CALC_CH(&OPL->P_CH[6]); 5.2265 - OPL_CALC_CH(&OPL->P_CH[7]); 5.2266 - OPL_CALC_CH(&OPL->P_CH[8]); 5.2267 - } 5.2268 - else /* Rhythm part */ 5.2269 - { 5.2270 - OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 ); 5.2271 - } 5.2272 - 5.2273 - lt = output[0]; 5.2274 - 5.2275 - lt >>= FINAL_SH; 5.2276 - 5.2277 - /* limit check */ 5.2278 - lt = limit( lt , MAXOUT, MINOUT ); 5.2279 - 5.2280 - #ifdef SAVE_SAMPLE 5.2281 - if (which==0) 5.2282 - { 5.2283 - SAVE_ALL_CHANNELS 5.2284 - } 5.2285 - #endif 5.2286 - 5.2287 - /* store to sound buffer */ 5.2288 - buf[i] = lt; 5.2289 - 5.2290 - advance(OPL); 5.2291 - } 5.2292 - 5.2293 -} 5.2294 -#endif /* BUILD_YM3812 */ 5.2295 - 5.2296 - 5.2297 - 5.2298 -#if (BUILD_YM3526) 5.2299 - 5.2300 -void *ym3526_init(running_device *device, UINT32 clock, UINT32 rate) 5.2301 -{ 5.2302 - /* emulator create */ 5.2303 - FM_OPL *YM3526 = OPLCreate(device,clock,rate,OPL_TYPE_YM3526); 5.2304 - if (YM3526) 5.2305 - { 5.2306 - OPL_save_state(YM3526, device); 5.2307 - ym3526_reset_chip(YM3526); 5.2308 - } 5.2309 - return YM3526; 5.2310 -} 5.2311 - 5.2312 -void ym3526_shutdown(void *chip) 5.2313 -{ 5.2314 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2315 - /* emulator shutdown */ 5.2316 - OPLDestroy(YM3526); 5.2317 -} 5.2318 -void ym3526_reset_chip(void *chip) 5.2319 -{ 5.2320 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2321 - OPLResetChip(YM3526); 5.2322 -} 5.2323 - 5.2324 -int ym3526_write(void *chip, int a, int v) 5.2325 -{ 5.2326 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2327 - return OPLWrite(YM3526, a, v); 5.2328 -} 5.2329 - 5.2330 -unsigned char ym3526_read(void *chip, int a) 5.2331 -{ 5.2332 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2333 - /* YM3526 always returns bit2 and bit1 in HIGH state */ 5.2334 - return OPLRead(YM3526, a) | 0x06 ; 5.2335 -} 5.2336 -int ym3526_timer_over(void *chip, int c) 5.2337 -{ 5.2338 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2339 - return OPLTimerOver(YM3526, c); 5.2340 -} 5.2341 - 5.2342 -void ym3526_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, void *param) 5.2343 -{ 5.2344 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2345 - OPLSetTimerHandler(YM3526, timer_handler, param); 5.2346 -} 5.2347 -void ym3526_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,void *param) 5.2348 -{ 5.2349 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2350 - OPLSetIRQHandler(YM3526, IRQHandler, param); 5.2351 -} 5.2352 -void ym3526_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param) 5.2353 -{ 5.2354 - FM_OPL *YM3526 = (FM_OPL *)chip; 5.2355 - OPLSetUpdateHandler(YM3526, UpdateHandler, param); 5.2356 -} 5.2357 - 5.2358 - 5.2359 -/* 5.2360 -** Generate samples for one of the YM3526's 5.2361 -** 5.2362 -** 'which' is the virtual YM3526 number 5.2363 -** '*buffer' is the output buffer pointer 5.2364 -** 'length' is the number of samples that should be generated 5.2365 -*/ 5.2366 -void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length) 5.2367 -{ 5.2368 - FM_OPL *OPL = (FM_OPL *)chip; 5.2369 - UINT8 rhythm = OPL->rhythm&0x20; 5.2370 - OPLSAMPLE *buf = buffer; 5.2371 - int i; 5.2372 - 5.2373 - if( (void *)OPL != cur_chip ){ 5.2374 - cur_chip = (void *)OPL; 5.2375 - /* rhythm slots */ 5.2376 - SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1]; 5.2377 - SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2]; 5.2378 - SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1]; 5.2379 - SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2]; 5.2380 - } 5.2381 - for( i=0; i < length ; i++ ) 5.2382 - { 5.2383 - int lt; 5.2384 - 5.2385 - output[0] = 0; 5.2386 - 5.2387 - advance_lfo(OPL); 5.2388 - 5.2389 - /* FM part */ 5.2390 - OPL_CALC_CH(&OPL->P_CH[0]); 5.2391 - OPL_CALC_CH(&OPL->P_CH[1]); 5.2392 - OPL_CALC_CH(&OPL->P_CH[2]); 5.2393 - OPL_CALC_CH(&OPL->P_CH[3]); 5.2394 - OPL_CALC_CH(&OPL->P_CH[4]); 5.2395 - OPL_CALC_CH(&OPL->P_CH[5]); 5.2396 - 5.2397 - if(!rhythm) 5.2398 - { 5.2399 - OPL_CALC_CH(&OPL->P_CH[6]); 5.2400 - OPL_CALC_CH(&OPL->P_CH[7]); 5.2401 - OPL_CALC_CH(&OPL->P_CH[8]); 5.2402 - } 5.2403 - else /* Rhythm part */ 5.2404 - { 5.2405 - OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 ); 5.2406 - } 5.2407 - 5.2408 - lt = output[0]; 5.2409 - 5.2410 - lt >>= FINAL_SH; 5.2411 - 5.2412 - /* limit check */ 5.2413 - lt = limit( lt , MAXOUT, MINOUT ); 5.2414 - 5.2415 - #ifdef SAVE_SAMPLE 5.2416 - if (which==0) 5.2417 - { 5.2418 - SAVE_ALL_CHANNELS 5.2419 - } 5.2420 - #endif 5.2421 - 5.2422 - /* store to sound buffer */ 5.2423 - buf[i] = lt; 5.2424 - 5.2425 - advance(OPL); 5.2426 - } 5.2427 - 5.2428 -} 5.2429 -#endif /* BUILD_YM3526 */ 5.2430 - 5.2431 - 5.2432 - 5.2433 - 5.2434 -#if BUILD_Y8950 5.2435 - 5.2436 -static void Y8950_deltat_status_set(void *chip, UINT8 changebits) 5.2437 -{ 5.2438 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2439 - OPL_STATUS_SET(Y8950, changebits); 5.2440 -} 5.2441 -static void Y8950_deltat_status_reset(void *chip, UINT8 changebits) 5.2442 -{ 5.2443 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2444 - OPL_STATUS_RESET(Y8950, changebits); 5.2445 -} 5.2446 - 5.2447 -void *y8950_init(running_device *device, UINT32 clock, UINT32 rate) 5.2448 -{ 5.2449 - /* emulator create */ 5.2450 - FM_OPL *Y8950 = OPLCreate(device,clock,rate,OPL_TYPE_Y8950); 5.2451 - if (Y8950) 5.2452 - { 5.2453 - Y8950->deltat->status_set_handler = Y8950_deltat_status_set; 5.2454 - Y8950->deltat->status_reset_handler = Y8950_deltat_status_reset; 5.2455 - Y8950->deltat->status_change_which_chip = Y8950; 5.2456 - Y8950->deltat->status_change_EOS_bit = 0x10; /* status flag: set bit4 on End Of Sample */ 5.2457 - Y8950->deltat->status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY (End Of: ADPCM analysis/synthesis, memory reading/writing) */ 5.2458 - 5.2459 - /*Y8950->deltat->write_time = 10.0 / clock;*/ /* a single byte write takes 10 cycles of main clock */ 5.2460 - /*Y8950->deltat->read_time = 8.0 / clock;*/ /* a single byte read takes 8 cycles of main clock */ 5.2461 - /* reset */ 5.2462 - OPL_save_state(Y8950, device); 5.2463 - y8950_reset_chip(Y8950); 5.2464 - } 5.2465 - 5.2466 - return Y8950; 5.2467 -} 5.2468 - 5.2469 -void y8950_shutdown(void *chip) 5.2470 -{ 5.2471 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2472 - /* emulator shutdown */ 5.2473 - OPLDestroy(Y8950); 5.2474 -} 5.2475 -void y8950_reset_chip(void *chip) 5.2476 -{ 5.2477 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2478 - OPLResetChip(Y8950); 5.2479 -} 5.2480 - 5.2481 -int y8950_write(void *chip, int a, int v) 5.2482 -{ 5.2483 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2484 - return OPLWrite(Y8950, a, v); 5.2485 -} 5.2486 - 5.2487 -unsigned char y8950_read(void *chip, int a) 5.2488 -{ 5.2489 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2490 - return OPLRead(Y8950, a); 5.2491 -} 5.2492 -int y8950_timer_over(void *chip, int c) 5.2493 -{ 5.2494 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2495 - return OPLTimerOver(Y8950, c); 5.2496 -} 5.2497 - 5.2498 -void y8950_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, void *param) 5.2499 -{ 5.2500 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2501 - OPLSetTimerHandler(Y8950, timer_handler, param); 5.2502 -} 5.2503 -void y8950_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,void *param) 5.2504 -{ 5.2505 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2506 - OPLSetIRQHandler(Y8950, IRQHandler, param); 5.2507 -} 5.2508 -void y8950_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param) 5.2509 -{ 5.2510 - FM_OPL *Y8950 = (FM_OPL *)chip; 5.2511 - OPLSetUpdateHandler(Y8950, UpdateHandler, param); 5.2512 -} 5.2513 - 5.2514 -void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size ) 5.2515 -{ 5.2516 - FM_OPL *OPL = (FM_OPL *)chip; 5.2517 - OPL->deltat->memory = (UINT8 *)(deltat_mem_ptr); 5.2518 - OPL->deltat->memory_size = deltat_mem_size; 5.2519 -} 5.2520 - 5.2521 -/* 5.2522 -** Generate samples for one of the Y8950's 5.2523 -** 5.2524 -** 'which' is the virtual Y8950 number 5.2525 -** '*buffer' is the output buffer pointer 5.2526 -** 'length' is the number of samples that should be generated 5.2527 -*/ 5.2528 -void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length) 5.2529 -{ 5.2530 - int i; 5.2531 - FM_OPL *OPL = (FM_OPL *)chip; 5.2532 - UINT8 rhythm = OPL->rhythm&0x20; 5.2533 - YM_DELTAT *DELTAT = OPL->deltat; 5.2534 - OPLSAMPLE *buf = buffer; 5.2535 - 5.2536 - if( (void *)OPL != cur_chip ){ 5.2537 - cur_chip = (void *)OPL; 5.2538 - /* rhythm slots */ 5.2539 - SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1]; 5.2540 - SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2]; 5.2541 - SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1]; 5.2542 - SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2]; 5.2543 - 5.2544 - } 5.2545 - for( i=0; i < length ; i++ ) 5.2546 - { 5.2547 - int lt; 5.2548 - 5.2549 - output[0] = 0; 5.2550 - output_deltat[0] = 0; 5.2551 - 5.2552 - advance_lfo(OPL); 5.2553 - 5.2554 - /* deltaT ADPCM */ 5.2555 - if( DELTAT->portstate&0x80 ) 5.2556 - YM_DELTAT_ADPCM_CALC(DELTAT); 5.2557 - 5.2558 - /* FM part */ 5.2559 - OPL_CALC_CH(&OPL->P_CH[0]); 5.2560 - OPL_CALC_CH(&OPL->P_CH[1]); 5.2561 - OPL_CALC_CH(&OPL->P_CH[2]); 5.2562 - OPL_CALC_CH(&OPL->P_CH[3]); 5.2563 - OPL_CALC_CH(&OPL->P_CH[4]); 5.2564 - OPL_CALC_CH(&OPL->P_CH[5]); 5.2565 - 5.2566 - if(!rhythm) 5.2567 - { 5.2568 - OPL_CALC_CH(&OPL->P_CH[6]); 5.2569 - OPL_CALC_CH(&OPL->P_CH[7]); 5.2570 - OPL_CALC_CH(&OPL->P_CH[8]); 5.2571 - } 5.2572 - else /* Rhythm part */ 5.2573 - { 5.2574 - OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 ); 5.2575 - } 5.2576 - 5.2577 - lt = output[0] + (output_deltat[0]>>11); 5.2578 - 5.2579 - lt >>= FINAL_SH; 5.2580 - 5.2581 - /* limit check */ 5.2582 - lt = limit( lt , MAXOUT, MINOUT ); 5.2583 - 5.2584 - #ifdef SAVE_SAMPLE 5.2585 - if (which==0) 5.2586 - { 5.2587 - SAVE_ALL_CHANNELS 5.2588 - } 5.2589 - #endif 5.2590 - 5.2591 - /* store to sound buffer */ 5.2592 - buf[i] = lt; 5.2593 - 5.2594 - advance(OPL); 5.2595 - } 5.2596 - 5.2597 -} 5.2598 - 5.2599 -void y8950_set_port_handler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,void * param) 5.2600 -{ 5.2601 - FM_OPL *OPL = (FM_OPL *)chip; 5.2602 - OPL->porthandler_w = PortHandler_w; 5.2603 - OPL->porthandler_r = PortHandler_r; 5.2604 - OPL->port_param = param; 5.2605 -} 5.2606 - 5.2607 -void y8950_set_keyboard_handler(void *chip,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,void * param) 5.2608 -{ 5.2609 - FM_OPL *OPL = (FM_OPL *)chip; 5.2610 - OPL->keyboardhandler_w = KeyboardHandler_w; 5.2611 - OPL->keyboardhandler_r = KeyboardHandler_r; 5.2612 - OPL->keyboard_param = param; 5.2613 -} 5.2614 - 5.2615 -#endif 5.2616 -
6.1 --- a/src/mame/fmopl.h Tue Feb 11 19:44:32 2014 +0000 6.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 6.3 @@ -1,126 +0,0 @@ 6.4 -#pragma once 6.5 - 6.6 -#ifndef __FMOPL_H__ 6.7 -#define __FMOPL_H__ 6.8 - 6.9 -#ifndef STUFF 6.10 -#define STUFF 6.11 -typedef int64_t attotime; 6.12 -#define ATTOTIME_IN_HZ(x) (1000000000/(x)) 6.13 -#define attotime_mul(x,y) ((x)*(y)) 6.14 -#define attotime_to_double(x) ((double)(x)/1000000000.0) 6.15 -#define attotime_zero 0 6.16 - 6.17 -#define running_device void 6.18 -#define INLINE static 6.19 -//#define M_PI 3.142 6.20 -#endif 6.21 - 6.22 -/* --- select emulation chips --- */ 6.23 -#define BUILD_YM3812 (1) 6.24 -#define BUILD_YM3526 (0) 6.25 -#define BUILD_Y8950 (0) 6.26 - 6.27 -/* select output bits size of output : 8 or 16 */ 6.28 -#define OPL_SAMPLE_BITS 16 6.29 - 6.30 -/* compiler dependence */ 6.31 -#ifndef __OSDCOMM_H__ 6.32 -#define __OSDCOMM_H__ 6.33 -typedef unsigned char UINT8; /* unsigned 8bit */ 6.34 -typedef unsigned short UINT16; /* unsigned 16bit */ 6.35 -typedef unsigned int UINT32; /* unsigned 32bit */ 6.36 -typedef signed char INT8; /* signed 8bit */ 6.37 -typedef signed short INT16; /* signed 16bit */ 6.38 -typedef signed int INT32; /* signed 32bit */ 6.39 -#endif /* __OSDCOMM_H__ */ 6.40 - 6.41 -typedef signed short OPLSAMPLE; 6.42 -/* 6.43 -#if (OPL_SAMPLE_BITS==16) 6.44 -typedef INT16 OPLSAMPLE; 6.45 -#endif 6.46 -#if (OPL_SAMPLE_BITS==8) 6.47 -typedef INT8 OPLSAMPLE; 6.48 -#endif 6.49 -*/ 6.50 - 6.51 -typedef void (*OPL_TIMERHANDLER)(void *param,int timer,attotime period); 6.52 -typedef void (*OPL_IRQHANDLER)(void *param,int irq); 6.53 -typedef void (*OPL_UPDATEHANDLER)(void *param,int min_interval_us); 6.54 -typedef void (*OPL_PORTHANDLER_W)(void *param,unsigned char data); 6.55 -typedef unsigned char (*OPL_PORTHANDLER_R)(void *param); 6.56 - 6.57 - 6.58 -#if BUILD_YM3812 6.59 - 6.60 -void *ym3812_init(running_device *device, UINT32 clock, UINT32 rate); 6.61 -void ym3812_shutdown(void *chip); 6.62 -void ym3812_reset_chip(void *chip); 6.63 -int ym3812_write(void *chip, int a, int v); 6.64 -unsigned char ym3812_read(void *chip, int a); 6.65 -int ym3812_timer_over(void *chip, int c); 6.66 -void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length); 6.67 - 6.68 -void ym3812_set_timer_handler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param); 6.69 -void ym3812_set_irq_handler(void *chip, OPL_IRQHANDLER IRQHandler, void *param); 6.70 -void ym3812_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param); 6.71 - 6.72 -#endif /* BUILD_YM3812 */ 6.73 - 6.74 - 6.75 -#if BUILD_YM3526 6.76 - 6.77 -/* 6.78 -** Initialize YM3526 emulator(s). 6.79 -** 6.80 -** 'num' is the number of virtual YM3526's to allocate 6.81 -** 'clock' is the chip clock in Hz 6.82 -** 'rate' is sampling rate 6.83 -*/ 6.84 -void *ym3526_init(running_device *device, UINT32 clock, UINT32 rate); 6.85 -/* shutdown the YM3526 emulators*/ 6.86 -void ym3526_shutdown(void *chip); 6.87 -void ym3526_reset_chip(void *chip); 6.88 -int ym3526_write(void *chip, int a, int v); 6.89 -unsigned char ym3526_read(void *chip, int a); 6.90 -int ym3526_timer_over(void *chip, int c); 6.91 -/* 6.92 -** Generate samples for one of the YM3526's 6.93 -** 6.94 -** 'which' is the virtual YM3526 number 6.95 -** '*buffer' is the output buffer pointer 6.96 -** 'length' is the number of samples that should be generated 6.97 -*/ 6.98 -void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length); 6.99 - 6.100 -void ym3526_set_timer_handler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param); 6.101 -void ym3526_set_irq_handler(void *chip, OPL_IRQHANDLER IRQHandler, void *param); 6.102 -void ym3526_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param); 6.103 - 6.104 -#endif /* BUILD_YM3526 */ 6.105 - 6.106 - 6.107 -#if BUILD_Y8950 6.108 - 6.109 -/* Y8950 port handlers */ 6.110 -void y8950_set_port_handler(void *chip, OPL_PORTHANDLER_W PortHandler_w, OPL_PORTHANDLER_R PortHandler_r, void *param); 6.111 -void y8950_set_keyboard_handler(void *chip, OPL_PORTHANDLER_W KeyboardHandler_w, OPL_PORTHANDLER_R KeyboardHandler_r, void *param); 6.112 -void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size ); 6.113 - 6.114 -void * y8950_init(running_device *device, UINT32 clock, UINT32 rate); 6.115 -void y8950_shutdown(void *chip); 6.116 -void y8950_reset_chip(void *chip); 6.117 -int y8950_write(void *chip, int a, int v); 6.118 -unsigned char y8950_read (void *chip, int a); 6.119 -int y8950_timer_over(void *chip, int c); 6.120 -void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length); 6.121 - 6.122 -void y8950_set_timer_handler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param); 6.123 -void y8950_set_irq_handler(void *chip, OPL_IRQHANDLER IRQHandler, void *param); 6.124 -void y8950_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param); 6.125 - 6.126 -#endif /* BUILD_Y8950 */ 6.127 - 6.128 - 6.129 -#endif /* __FMOPL_H__ */
7.1 --- a/src/mame/ymf262.c Tue Feb 11 19:44:32 2014 +0000 7.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 7.3 @@ -1,2730 +0,0 @@ 7.4 -/* 7.5 -** 7.6 -** File: ymf262.c - software implementation of YMF262 7.7 -** FM sound generator type OPL3 7.8 -** 7.9 -** Copyright Jarek Burczynski 7.10 -** 7.11 -** Version 0.2 7.12 -** 7.13 - 7.14 -Revision History: 7.15 - 7.16 -03-03-2003: initial release 7.17 - - thanks to Olivier Galibert and Chris Hardy for YMF262 and YAC512 chips 7.18 - - thanks to Stiletto for the datasheets 7.19 - 7.20 - Features as listed in 4MF262A6 data sheet: 7.21 - 1. Registers are compatible with YM3812 (OPL2) FM sound source. 7.22 - 2. Up to six sounds can be used as four-operator melody sounds for variety. 7.23 - 3. 18 simultaneous melody sounds, or 15 melody sounds with 5 rhythm sounds (with two operators). 7.24 - 4. 6 four-operator melody sounds and 6 two-operator melody sounds, or 6 four-operator melody 7.25 - sounds, 3 two-operator melody sounds and 5 rhythm sounds (with four operators). 7.26 - 5. 8 selectable waveforms. 7.27 - 6. 4-channel sound output. 7.28 - 7. YMF262 compabile DAC (YAC512) is available. 7.29 - 8. LFO for vibrato and tremolo effedts. 7.30 - 9. 2 programable timers. 7.31 - 10. Shorter register access time compared with YM3812. 7.32 - 11. 5V single supply silicon gate CMOS process. 7.33 - 12. 24 Pin SOP Package (YMF262-M), 48 Pin SQFP Package (YMF262-S). 7.34 - 7.35 - 7.36 -differences between OPL2 and OPL3 not documented in Yamaha datahasheets: 7.37 -- sinus table is a little different: the negative part is off by one... 7.38 - 7.39 -- in order to enable selection of four different waveforms on OPL2 7.40 - one must set bit 5 in register 0x01(test). 7.41 - on OPL3 this bit is ignored and 4-waveform select works *always*. 7.42 - (Don't confuse this with OPL3's 8-waveform select.) 7.43 - 7.44 -- Envelope Generator: all 15 x rates take zero time on OPL3 7.45 - (on OPL2 15 0 and 15 1 rates take some time while 15 2 and 15 3 rates 7.46 - take zero time) 7.47 - 7.48 -- channel calculations: output of operator 1 is in perfect sync with 7.49 - output of operator 2 on OPL3; on OPL and OPL2 output of operator 1 7.50 - is always delayed by one sample compared to output of operator 2 7.51 - 7.52 - 7.53 -differences between OPL2 and OPL3 shown in datasheets: 7.54 -- YMF262 does not support CSM mode 7.55 - 7.56 - 7.57 -*/ 7.58 - 7.59 -#include <stdio.h> 7.60 -#include <stdint.h> 7.61 -#include <math.h> 7.62 -#include <string.h> 7.63 -#include <stdlib.h> 7.64 -//#include "emu.h" 7.65 -#include "ymf262.h" 7.66 - 7.67 - 7.68 - 7.69 -/* output final shift */ 7.70 -#if (OPL3_SAMPLE_BITS==16) 7.71 - #define FINAL_SH (0) 7.72 - #define MAXOUT (+32767) 7.73 - #define MINOUT (-32768) 7.74 -#else 7.75 - #define FINAL_SH (8) 7.76 - #define MAXOUT (+127) 7.77 - #define MINOUT (-128) 7.78 -#endif 7.79 - 7.80 - 7.81 -#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */ 7.82 -#define EG_SH 16 /* 16.16 fixed point (EG timing) */ 7.83 -#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */ 7.84 -#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */ 7.85 - 7.86 -#define FREQ_MASK ((1<<FREQ_SH)-1) 7.87 - 7.88 -/* envelope output entries */ 7.89 -#define ENV_BITS 10 7.90 -#define ENV_LEN (1<<ENV_BITS) 7.91 -#define ENV_STEP (128.0/ENV_LEN) 7.92 - 7.93 -#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/ 7.94 -#define MIN_ATT_INDEX (0) 7.95 - 7.96 -/* sinwave entries */ 7.97 -#define SIN_BITS 10 7.98 -#define SIN_LEN (1<<SIN_BITS) 7.99 -#define SIN_MASK (SIN_LEN-1) 7.100 - 7.101 -#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */ 7.102 - 7.103 - 7.104 - 7.105 -/* register number to channel number , slot offset */ 7.106 -#define SLOT1 0 7.107 -#define SLOT2 1 7.108 - 7.109 -/* Envelope Generator phases */ 7.110 - 7.111 -#define EG_ATT 4 7.112 -#define EG_DEC 3 7.113 -#define EG_SUS 2 7.114 -#define EG_REL 1 7.115 -#define EG_OFF 0 7.116 - 7.117 - 7.118 -/* save output as raw 16-bit sample */ 7.119 - 7.120 -/*#define SAVE_SAMPLE*/ 7.121 - 7.122 -#ifdef SAVE_SAMPLE 7.123 -static FILE *sample[1]; 7.124 - #if 1 /*save to MONO file */ 7.125 - #define SAVE_ALL_CHANNELS \ 7.126 - { signed int pom = a; \ 7.127 - fputc((unsigned short)pom&0xff,sample[0]); \ 7.128 - fputc(((unsigned short)pom>>8)&0xff,sample[0]); \ 7.129 - } 7.130 - #else /*save to STEREO file */ 7.131 - #define SAVE_ALL_CHANNELS \ 7.132 - { signed int pom = a; \ 7.133 - fputc((unsigned short)pom&0xff,sample[0]); \ 7.134 - fputc(((unsigned short)pom>>8)&0xff,sample[0]); \ 7.135 - pom = b; \ 7.136 - fputc((unsigned short)pom&0xff,sample[0]); \ 7.137 - fputc(((unsigned short)pom>>8)&0xff,sample[0]); \ 7.138 - } 7.139 - #endif 7.140 -#endif 7.141 - 7.142 -#define LOG_CYM_FILE 0 7.143 -static FILE * cymfile = NULL; 7.144 - 7.145 - 7.146 - 7.147 - 7.148 - 7.149 -#define OPL3_TYPE_YMF262 (0) /* 36 operators, 8 waveforms */ 7.150 - 7.151 - 7.152 -typedef struct{ 7.153 - UINT32 ar; /* attack rate: AR<<2 */ 7.154 - UINT32 dr; /* decay rate: DR<<2 */ 7.155 - UINT32 rr; /* release rate:RR<<2 */ 7.156 - UINT8 KSR; /* key scale rate */ 7.157 - UINT8 ksl; /* keyscale level */ 7.158 - UINT8 ksr; /* key scale rate: kcode>>KSR */ 7.159 - UINT8 mul; /* multiple: mul_tab[ML] */ 7.160 - 7.161 - /* Phase Generator */ 7.162 - UINT32 Cnt; /* frequency counter */ 7.163 - UINT32 Incr; /* frequency counter step */ 7.164 - UINT8 FB; /* feedback shift value */ 7.165 - INT32 *connect; /* slot output pointer */ 7.166 - INT32 op1_out[2]; /* slot1 output for feedback */ 7.167 - UINT8 CON; /* connection (algorithm) type */ 7.168 - 7.169 - /* Envelope Generator */ 7.170 - UINT8 eg_type; /* percussive/non-percussive mode */ 7.171 - UINT8 state; /* phase type */ 7.172 - UINT32 TL; /* total level: TL << 2 */ 7.173 - INT32 TLL; /* adjusted now TL */ 7.174 - INT32 volume; /* envelope counter */ 7.175 - UINT32 sl; /* sustain level: sl_tab[SL] */ 7.176 - 7.177 - UINT32 eg_m_ar; /* (attack state) */ 7.178 - UINT8 eg_sh_ar; /* (attack state) */ 7.179 - UINT8 eg_sel_ar; /* (attack state) */ 7.180 - UINT32 eg_m_dr; /* (decay state) */ 7.181 - UINT8 eg_sh_dr; /* (decay state) */ 7.182 - UINT8 eg_sel_dr; /* (decay state) */ 7.183 - UINT32 eg_m_rr; /* (release state) */ 7.184 - UINT8 eg_sh_rr; /* (release state) */ 7.185 - UINT8 eg_sel_rr; /* (release state) */ 7.186 - 7.187 - UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */ 7.188 - 7.189 - /* LFO */ 7.190 - UINT32 AMmask; /* LFO Amplitude Modulation enable mask */ 7.191 - UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/ 7.192 - 7.193 - /* waveform select */ 7.194 - UINT8 waveform_number; 7.195 - unsigned int wavetable; 7.196 - 7.197 -//unsigned char reserved[128-84];//speedup: pump up the struct size to power of 2 7.198 -unsigned char reserved[128-100];//speedup: pump up the struct size to power of 2 7.199 - 7.200 -} OPL3_SLOT; 7.201 - 7.202 -typedef struct{ 7.203 - OPL3_SLOT SLOT[2]; 7.204 - 7.205 - UINT32 block_fnum; /* block+fnum */ 7.206 - UINT32 fc; /* Freq. Increment base */ 7.207 - UINT32 ksl_base; /* KeyScaleLevel Base step */ 7.208 - UINT8 kcode; /* key code (for key scaling) */ 7.209 - 7.210 - /* 7.211 - there are 12 2-operator channels which can be combined in pairs 7.212 - to form six 4-operator channel, they are: 7.213 - 0 and 3, 7.214 - 1 and 4, 7.215 - 2 and 5, 7.216 - 9 and 12, 7.217 - 10 and 13, 7.218 - 11 and 14 7.219 - */ 7.220 - UINT8 extended; /* set to 1 if this channel forms up a 4op channel with another channel(only used by first of pair of channels, ie 0,1,2 and 9,10,11) */ 7.221 - 7.222 -unsigned char reserved[512-272];//speedup:pump up the struct size to power of 2 7.223 - 7.224 -} OPL3_CH; 7.225 - 7.226 -/* OPL3 state */ 7.227 -typedef struct { 7.228 - OPL3_CH P_CH[18]; /* OPL3 chips have 18 channels */ 7.229 - 7.230 - UINT32 pan[18*4]; /* channels output masks (0xffffffff = enable); 4 masks per one channel */ 7.231 - UINT32 pan_ctrl_value[18]; /* output control values 1 per one channel (1 value contains 4 masks) */ 7.232 - 7.233 - UINT32 eg_cnt; /* global envelope generator counter */ 7.234 - UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/288 (288=8*36) */ 7.235 - UINT32 eg_timer_add; /* step of eg_timer */ 7.236 - UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */ 7.237 - 7.238 - UINT32 fn_tab[1024]; /* fnumber->increment counter */ 7.239 - 7.240 - /* LFO */ 7.241 - UINT8 lfo_am_depth; 7.242 - UINT8 lfo_pm_depth_range; 7.243 - UINT32 lfo_am_cnt; 7.244 - UINT32 lfo_am_inc; 7.245 - UINT32 lfo_pm_cnt; 7.246 - UINT32 lfo_pm_inc; 7.247 - 7.248 - UINT32 noise_rng; /* 23 bit noise shift register */ 7.249 - UINT32 noise_p; /* current noise 'phase' */ 7.250 - UINT32 noise_f; /* current noise period */ 7.251 - 7.252 - UINT8 OPL3_mode; /* OPL3 extension enable flag */ 7.253 - 7.254 - UINT8 rhythm; /* Rhythm mode */ 7.255 - 7.256 - int T[2]; /* timer counters */ 7.257 - UINT8 st[2]; /* timer enable */ 7.258 - 7.259 - UINT32 address; /* address register */ 7.260 - UINT8 status; /* status flag */ 7.261 - UINT8 statusmask; /* status mask */ 7.262 - 7.263 - UINT8 nts; /* NTS (note select) */ 7.264 - 7.265 - /* external event callback handlers */ 7.266 - OPL3_TIMERHANDLER timer_handler;/* TIMER handler */ 7.267 - void *TimerParam; /* TIMER parameter */ 7.268 - OPL3_IRQHANDLER IRQHandler; /* IRQ handler */ 7.269 - void *IRQParam; /* IRQ parameter */ 7.270 - OPL3_UPDATEHANDLER UpdateHandler;/* stream update handler */ 7.271 - void *UpdateParam; /* stream update parameter */ 7.272 - 7.273 - UINT8 type; /* chip type */ 7.274 - int clock; /* master clock (Hz) */ 7.275 - int rate; /* sampling rate (Hz) */ 7.276 - double freqbase; /* frequency base */ 7.277 - attotime TimerBase; /* Timer base time (==sampling time)*/ 7.278 - running_device *device; 7.279 -} OPL3; 7.280 - 7.281 - 7.282 - 7.283 -/* mapping of register number (offset) to slot number used by the emulator */ 7.284 -static const int slot_array[32]= 7.285 -{ 7.286 - 0, 2, 4, 1, 3, 5,-1,-1, 7.287 - 6, 8,10, 7, 9,11,-1,-1, 7.288 - 12,14,16,13,15,17,-1,-1, 7.289 - -1,-1,-1,-1,-1,-1,-1,-1 7.290 -}; 7.291 - 7.292 -/* key scale level */ 7.293 -/* table is 3dB/octave , DV converts this into 6dB/octave */ 7.294 -/* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */ 7.295 -#define DV (0.1875/2.0) 7.296 -static const UINT32 ksl_tab[8*16]= 7.297 -{ 7.298 - /* OCT 0 */ 7.299 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.300 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.301 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.302 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.303 - /* OCT 1 */ 7.304 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.305 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.306 - 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV, 7.307 - 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV, 7.308 - /* OCT 2 */ 7.309 - 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 7.310 - 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV, 7.311 - 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV, 7.312 - 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV, 7.313 - /* OCT 3 */ 7.314 - 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV, 7.315 - 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV, 7.316 - 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV, 7.317 - 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV, 7.318 - /* OCT 4 */ 7.319 - 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV, 7.320 - 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV, 7.321 - 9.000/DV, 9.750/DV,10.125/DV,10.500/DV, 7.322 - 10.875/DV,11.250/DV,11.625/DV,12.000/DV, 7.323 - /* OCT 5 */ 7.324 - 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV, 7.325 - 9.000/DV,10.125/DV,10.875/DV,11.625/DV, 7.326 - 12.000/DV,12.750/DV,13.125/DV,13.500/DV, 7.327 - 13.875/DV,14.250/DV,14.625/DV,15.000/DV, 7.328 - /* OCT 6 */ 7.329 - 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV, 7.330 - 12.000/DV,13.125/DV,13.875/DV,14.625/DV, 7.331 - 15.000/DV,15.750/DV,16.125/DV,16.500/DV, 7.332 - 16.875/DV,17.250/DV,17.625/DV,18.000/DV, 7.333 - /* OCT 7 */ 7.334 - 0.000/DV, 9.000/DV,12.000/DV,13.875/DV, 7.335 - 15.000/DV,16.125/DV,16.875/DV,17.625/DV, 7.336 - 18.000/DV,18.750/DV,19.125/DV,19.500/DV, 7.337 - 19.875/DV,20.250/DV,20.625/DV,21.000/DV 7.338 -}; 7.339 -#undef DV 7.340 - 7.341 -/* sustain level table (3dB per step) */ 7.342 -/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/ 7.343 -#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) ) 7.344 -static const UINT32 sl_tab[16]={ 7.345 - SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7), 7.346 - SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31) 7.347 -}; 7.348 -#undef SC 7.349 - 7.350 - 7.351 -#define RATE_STEPS (8) 7.352 -static const unsigned char eg_inc[15*RATE_STEPS]={ 7.353 - 7.354 -/*cycle:0 1 2 3 4 5 6 7*/ 7.355 - 7.356 -/* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */ 7.357 -/* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */ 7.358 -/* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */ 7.359 -/* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */ 7.360 - 7.361 -/* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */ 7.362 -/* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */ 7.363 -/* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */ 7.364 -/* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */ 7.365 - 7.366 -/* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */ 7.367 -/* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */ 7.368 -/*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */ 7.369 -/*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */ 7.370 - 7.371 -/*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 for decay */ 7.372 -/*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 0, 15 1, 15 2, 15 3 for attack (zero time) */ 7.373 -/*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */ 7.374 -}; 7.375 - 7.376 - 7.377 -#define O(a) (a*RATE_STEPS) 7.378 - 7.379 -/* note that there is no O(13) in this table - it's directly in the code */ 7.380 -static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */ 7.381 -/* 16 infinite time rates */ 7.382 -O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14), 7.383 -O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14), 7.384 - 7.385 -/* rates 00-12 */ 7.386 -O( 0),O( 1),O( 2),O( 3), 7.387 -O( 0),O( 1),O( 2),O( 3), 7.388 -O( 0),O( 1),O( 2),O( 3), 7.389 -O( 0),O( 1),O( 2),O( 3), 7.390 -O( 0),O( 1),O( 2),O( 3), 7.391 -O( 0),O( 1),O( 2),O( 3), 7.392 -O( 0),O( 1),O( 2),O( 3), 7.393 -O( 0),O( 1),O( 2),O( 3), 7.394 -O( 0),O( 1),O( 2),O( 3), 7.395 -O( 0),O( 1),O( 2),O( 3), 7.396 -O( 0),O( 1),O( 2),O( 3), 7.397 -O( 0),O( 1),O( 2),O( 3), 7.398 -O( 0),O( 1),O( 2),O( 3), 7.399 - 7.400 -/* rate 13 */ 7.401 -O( 4),O( 5),O( 6),O( 7), 7.402 - 7.403 -/* rate 14 */ 7.404 -O( 8),O( 9),O(10),O(11), 7.405 - 7.406 -/* rate 15 */ 7.407 -O(12),O(12),O(12),O(12), 7.408 - 7.409 -/* 16 dummy rates (same as 15 3) */ 7.410 -O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12), 7.411 -O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12), 7.412 - 7.413 -}; 7.414 -#undef O 7.415 - 7.416 -/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */ 7.417 -/*shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0 */ 7.418 -/*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */ 7.419 - 7.420 -#define O(a) (a*1) 7.421 -static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */ 7.422 -/* 16 infinite time rates */ 7.423 -O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), 7.424 -O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), 7.425 - 7.426 -/* rates 00-12 */ 7.427 -O(12),O(12),O(12),O(12), 7.428 -O(11),O(11),O(11),O(11), 7.429 -O(10),O(10),O(10),O(10), 7.430 -O( 9),O( 9),O( 9),O( 9), 7.431 -O( 8),O( 8),O( 8),O( 8), 7.432 -O( 7),O( 7),O( 7),O( 7), 7.433 -O( 6),O( 6),O( 6),O( 6), 7.434 -O( 5),O( 5),O( 5),O( 5), 7.435 -O( 4),O( 4),O( 4),O( 4), 7.436 -O( 3),O( 3),O( 3),O( 3), 7.437 -O( 2),O( 2),O( 2),O( 2), 7.438 -O( 1),O( 1),O( 1),O( 1), 7.439 -O( 0),O( 0),O( 0),O( 0), 7.440 - 7.441 -/* rate 13 */ 7.442 -O( 0),O( 0),O( 0),O( 0), 7.443 - 7.444 -/* rate 14 */ 7.445 -O( 0),O( 0),O( 0),O( 0), 7.446 - 7.447 -/* rate 15 */ 7.448 -O( 0),O( 0),O( 0),O( 0), 7.449 - 7.450 -/* 16 dummy rates (same as 15 3) */ 7.451 -O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), 7.452 -O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), 7.453 - 7.454 -}; 7.455 -#undef O 7.456 - 7.457 - 7.458 -/* multiple table */ 7.459 -#define ML 2 7.460 -static const UINT8 mul_tab[16]= { 7.461 -/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */ 7.462 - 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML, 7.463 - 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML 7.464 -}; 7.465 -#undef ML 7.466 - 7.467 -/* TL_TAB_LEN is calculated as: 7.468 - 7.469 -* (12+1)=13 - sinus amplitude bits (Y axis) 7.470 -* additional 1: to compensate for calculations of negative part of waveform 7.471 -* (if we don't add it then the greatest possible _negative_ value would be -2 7.472 -* and we really need -1 for waveform #7) 7.473 -* 2 - sinus sign bit (Y axis) 7.474 -* TL_RES_LEN - sinus resolution (X axis) 7.475 -*/ 7.476 -#define TL_TAB_LEN (13*2*TL_RES_LEN) 7.477 -static signed int tl_tab[TL_TAB_LEN]; 7.478 - 7.479 -#define ENV_QUIET (TL_TAB_LEN>>4) 7.480 - 7.481 -/* sin waveform table in 'decibel' scale */ 7.482 -/* there are eight waveforms on OPL3 chips */ 7.483 -static unsigned int sin_tab[SIN_LEN * 8]; 7.484 - 7.485 - 7.486 -/* LFO Amplitude Modulation table (verified on real YM3812) 7.487 - 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples 7.488 - 7.489 - Length: 210 elements. 7.490 - 7.491 - Each of the elements has to be repeated 7.492 - exactly 64 times (on 64 consecutive samples). 7.493 - The whole table takes: 64 * 210 = 13440 samples. 7.494 - 7.495 - When AM = 1 data is used directly 7.496 - When AM = 0 data is divided by 4 before being used (loosing precision is important) 7.497 -*/ 7.498 - 7.499 -#define LFO_AM_TAB_ELEMENTS 210 7.500 - 7.501 -static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = { 7.502 -0,0,0,0,0,0,0, 7.503 -1,1,1,1, 7.504 -2,2,2,2, 7.505 -3,3,3,3, 7.506 -4,4,4,4, 7.507 -5,5,5,5, 7.508 -6,6,6,6, 7.509 -7,7,7,7, 7.510 -8,8,8,8, 7.511 -9,9,9,9, 7.512 -10,10,10,10, 7.513 -11,11,11,11, 7.514 -12,12,12,12, 7.515 -13,13,13,13, 7.516 -14,14,14,14, 7.517 -15,15,15,15, 7.518 -16,16,16,16, 7.519 -17,17,17,17, 7.520 -18,18,18,18, 7.521 -19,19,19,19, 7.522 -20,20,20,20, 7.523 -21,21,21,21, 7.524 -22,22,22,22, 7.525 -23,23,23,23, 7.526 -24,24,24,24, 7.527 -25,25,25,25, 7.528 -26,26,26, 7.529 -25,25,25,25, 7.530 -24,24,24,24, 7.531 -23,23,23,23, 7.532 -22,22,22,22, 7.533 -21,21,21,21, 7.534 -20,20,20,20, 7.535 -19,19,19,19, 7.536 -18,18,18,18, 7.537 -17,17,17,17, 7.538 -16,16,16,16, 7.539 -15,15,15,15, 7.540 -14,14,14,14, 7.541 -13,13,13,13, 7.542 -12,12,12,12, 7.543 -11,11,11,11, 7.544 -10,10,10,10, 7.545 -9,9,9,9, 7.546 -8,8,8,8, 7.547 -7,7,7,7, 7.548 -6,6,6,6, 7.549 -5,5,5,5, 7.550 -4,4,4,4, 7.551 -3,3,3,3, 7.552 -2,2,2,2, 7.553 -1,1,1,1 7.554 -}; 7.555 - 7.556 -/* LFO Phase Modulation table (verified on real YM3812) */ 7.557 -static const INT8 lfo_pm_table[8*8*2] = { 7.558 - 7.559 -/* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */ 7.560 -0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/ 7.561 -0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/ 7.562 - 7.563 -/* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */ 7.564 -0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/ 7.565 -1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/ 7.566 - 7.567 -/* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */ 7.568 -1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/ 7.569 -2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/ 7.570 - 7.571 -/* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */ 7.572 -1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/ 7.573 -3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/ 7.574 - 7.575 -/* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */ 7.576 -2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/ 7.577 -4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/ 7.578 - 7.579 -/* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */ 7.580 -2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/ 7.581 -5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/ 7.582 - 7.583 -/* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */ 7.584 -3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/ 7.585 -6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/ 7.586 - 7.587 -/* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */ 7.588 -3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/ 7.589 -7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/ 7.590 -}; 7.591 - 7.592 - 7.593 -/* lock level of common table */ 7.594 -static int num_lock = 0; 7.595 - 7.596 -/* work table */ 7.597 -static void *cur_chip = NULL; /* current chip point */ 7.598 -static OPL3_SLOT *SLOT7_1,*SLOT7_2,*SLOT8_1,*SLOT8_2; 7.599 - 7.600 -static signed int phase_modulation; /* phase modulation input (SLOT 2) */ 7.601 -static signed int phase_modulation2; /* phase modulation input (SLOT 3 in 4 operator channels) */ 7.602 -static signed int chanout[18]; /* 18 channels */ 7.603 - 7.604 - 7.605 -static UINT32 LFO_AM; 7.606 -static INT32 LFO_PM; 7.607 - 7.608 - 7.609 - 7.610 -INLINE int limit( int val, int max, int min ) { 7.611 - if ( val > max ) 7.612 - val = max; 7.613 - else if ( val < min ) 7.614 - val = min; 7.615 - 7.616 - return val; 7.617 -} 7.618 - 7.619 - 7.620 -/* status set and IRQ handling */ 7.621 -INLINE void OPL3_STATUS_SET(OPL3 *chip,int flag) 7.622 -{ 7.623 - /* set status flag masking out disabled IRQs */ 7.624 - chip->status |= (flag & chip->statusmask); 7.625 - if(!(chip->status & 0x80)) 7.626 - { 7.627 - if(chip->status & 0x7f) 7.628 - { /* IRQ on */ 7.629 - chip->status |= 0x80; 7.630 - /* callback user interrupt handler (IRQ is OFF to ON) */ 7.631 - if(chip->IRQHandler) (chip->IRQHandler)(chip->IRQParam,1); 7.632 - } 7.633 - } 7.634 - pclog("Set %i %02X\n",flag,chip->status); 7.635 -} 7.636 - 7.637 -/* status reset and IRQ handling */ 7.638 -INLINE void OPL3_STATUS_RESET(OPL3 *chip,int flag) 7.639 -{ 7.640 - /* reset status flag */ 7.641 - chip->status &= ~flag; 7.642 - if(chip->status & 0x80) 7.643 - { 7.644 - if (!(chip->status & 0x7f)) 7.645 - { 7.646 - chip->status &= 0x7f; 7.647 - /* callback user interrupt handler (IRQ is ON to OFF) */ 7.648 - if(chip->IRQHandler) (chip->IRQHandler)(chip->IRQParam,0); 7.649 - } 7.650 - } 7.651 - pclog("Reset %i %02X\n",flag,chip->status); 7.652 -} 7.653 - 7.654 -/* IRQ mask set */ 7.655 -INLINE void OPL3_STATUSMASK_SET(OPL3 *chip,int flag) 7.656 -{ 7.657 - chip->statusmask = flag; 7.658 - /* IRQ handling check */ 7.659 - OPL3_STATUS_SET(chip,0); 7.660 - OPL3_STATUS_RESET(chip,0); 7.661 -} 7.662 - 7.663 - 7.664 -/* advance LFO to next sample */ 7.665 -INLINE void advance_lfo(OPL3 *chip) 7.666 -{ 7.667 - UINT8 tmp; 7.668 - 7.669 - /* LFO */ 7.670 - chip->lfo_am_cnt += chip->lfo_am_inc; 7.671 - if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */ 7.672 - chip->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH); 7.673 - 7.674 - tmp = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ]; 7.675 - 7.676 - if (chip->lfo_am_depth) 7.677 - LFO_AM = tmp; 7.678 - else 7.679 - LFO_AM = tmp>>2; 7.680 - 7.681 - chip->lfo_pm_cnt += chip->lfo_pm_inc; 7.682 - LFO_PM = ((chip->lfo_pm_cnt>>LFO_SH) & 7) | chip->lfo_pm_depth_range; 7.683 -} 7.684 - 7.685 -/* advance to next sample */ 7.686 -INLINE void advance(OPL3 *chip) 7.687 -{ 7.688 - OPL3_CH *CH; 7.689 - OPL3_SLOT *op; 7.690 - int i; 7.691 - 7.692 - chip->eg_timer += chip->eg_timer_add; 7.693 - 7.694 - while (chip->eg_timer >= chip->eg_timer_overflow) 7.695 - { 7.696 - chip->eg_timer -= chip->eg_timer_overflow; 7.697 - 7.698 - chip->eg_cnt++; 7.699 - 7.700 - for (i=0; i<9*2*2; i++) 7.701 - { 7.702 - CH = &chip->P_CH[i/2]; 7.703 - op = &CH->SLOT[i&1]; 7.704 -#if 1 7.705 - /* Envelope Generator */ 7.706 - switch(op->state) 7.707 - { 7.708 - case EG_ATT: /* attack phase */ 7.709 -// if ( !(chip->eg_cnt & ((1<<op->eg_sh_ar)-1) ) ) 7.710 - if ( !(chip->eg_cnt & op->eg_m_ar) ) 7.711 - { 7.712 - op->volume += (~op->volume * 7.713 - (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)]) 7.714 - ) >>3; 7.715 - 7.716 - if (op->volume <= MIN_ATT_INDEX) 7.717 - { 7.718 - op->volume = MIN_ATT_INDEX; 7.719 - op->state = EG_DEC; 7.720 - } 7.721 - 7.722 - } 7.723 - break; 7.724 - 7.725 - case EG_DEC: /* decay phase */ 7.726 -// if ( !(chip->eg_cnt & ((1<<op->eg_sh_dr)-1) ) ) 7.727 - if ( !(chip->eg_cnt & op->eg_m_dr) ) 7.728 - { 7.729 - op->volume += eg_inc[op->eg_sel_dr + ((chip->eg_cnt>>op->eg_sh_dr)&7)]; 7.730 - 7.731 - if ( op->volume >= op->sl ) 7.732 - op->state = EG_SUS; 7.733 - 7.734 - } 7.735 - break; 7.736 - 7.737 - case EG_SUS: /* sustain phase */ 7.738 - 7.739 - /* this is important behaviour: 7.740 - one can change percusive/non-percussive modes on the fly and 7.741 - the chip will remain in sustain phase - verified on real YM3812 */ 7.742 - 7.743 - if(op->eg_type) /* non-percussive mode */ 7.744 - { 7.745 - /* do nothing */ 7.746 - } 7.747 - else /* percussive mode */ 7.748 - { 7.749 - /* during sustain phase chip adds Release Rate (in percussive mode) */ 7.750 -// if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) ) 7.751 - if ( !(chip->eg_cnt & op->eg_m_rr) ) 7.752 - { 7.753 - op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)]; 7.754 - 7.755 - if ( op->volume >= MAX_ATT_INDEX ) 7.756 - op->volume = MAX_ATT_INDEX; 7.757 - } 7.758 - /* else do nothing in sustain phase */ 7.759 - } 7.760 - break; 7.761 - 7.762 - case EG_REL: /* release phase */ 7.763 -// if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) ) 7.764 - if ( !(chip->eg_cnt & op->eg_m_rr) ) 7.765 - { 7.766 - op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)]; 7.767 - 7.768 - if ( op->volume >= MAX_ATT_INDEX ) 7.769 - { 7.770 - op->volume = MAX_ATT_INDEX; 7.771 - op->state = EG_OFF; 7.772 - } 7.773 - 7.774 - } 7.775 - break; 7.776 - 7.777 - default: 7.778 - break; 7.779 - } 7.780 -#endif 7.781 - } 7.782 - } 7.783 - 7.784 - for (i=0; i<9*2*2; i++) 7.785 - { 7.786 - CH = &chip->P_CH[i/2]; 7.787 - op = &CH->SLOT[i&1]; 7.788 - 7.789 - /* Phase Generator */ 7.790 - if(op->vib) 7.791 - { 7.792 - UINT8 block; 7.793 - unsigned int block_fnum = CH->block_fnum; 7.794 - 7.795 - unsigned int fnum_lfo = (block_fnum&0x0380) >> 7; 7.796 - 7.797 - signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ]; 7.798 - 7.799 - if (lfo_fn_table_index_offset) /* LFO phase modulation active */ 7.800 - { 7.801 - block_fnum += lfo_fn_table_index_offset; 7.802 - block = (block_fnum&0x1c00) >> 10; 7.803 - op->Cnt += (chip->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul; 7.804 - } 7.805 - else /* LFO phase modulation = zero */ 7.806 - { 7.807 - op->Cnt += op->Incr; 7.808 - } 7.809 - } 7.810 - else /* LFO phase modulation disabled for this operator */ 7.811 - { 7.812 - op->Cnt += op->Incr; 7.813 - } 7.814 - } 7.815 - 7.816 - /* The Noise Generator of the YM3812 is 23-bit shift register. 7.817 - * Period is equal to 2^23-2 samples. 7.818 - * Register works at sampling frequency of the chip, so output 7.819 - * can change on every sample. 7.820 - * 7.821 - * Output of the register and input to the bit 22 is: 7.822 - * bit0 XOR bit14 XOR bit15 XOR bit22 7.823 - * 7.824 - * Simply use bit 22 as the noise output. 7.825 - */ 7.826 - 7.827 - chip->noise_p += chip->noise_f; 7.828 - i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */ 7.829 - chip->noise_p &= FREQ_MASK; 7.830 - while (i) 7.831 - { 7.832 - /* 7.833 - UINT32 j; 7.834 - j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1; 7.835 - chip->noise_rng = (j<<22) | (chip->noise_rng>>1); 7.836 - */ 7.837 - 7.838 - /* 7.839 - Instead of doing all the logic operations above, we 7.840 - use a trick here (and use bit 0 as the noise output). 7.841 - The difference is only that the noise bit changes one 7.842 - step ahead. This doesn't matter since we don't know 7.843 - what is real state of the noise_rng after the reset. 7.844 - */ 7.845 - 7.846 - if (chip->noise_rng & 1) chip->noise_rng ^= 0x800302; 7.847 - chip->noise_rng >>= 1; 7.848 - 7.849 - i--; 7.850 - } 7.851 -} 7.852 - 7.853 - 7.854 -INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab) 7.855 -{ 7.856 - UINT32 p; 7.857 - 7.858 - p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ]; 7.859 - 7.860 - if (p >= TL_TAB_LEN) 7.861 - return 0; 7.862 - return tl_tab[p]; 7.863 -} 7.864 - 7.865 -INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab) 7.866 -{ 7.867 - UINT32 p; 7.868 - 7.869 - p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm))>>FREQ_SH) & SIN_MASK)]; 7.870 - 7.871 - if (p >= TL_TAB_LEN) 7.872 - return 0; 7.873 - return tl_tab[p]; 7.874 -} 7.875 - 7.876 - 7.877 -#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask)) 7.878 - 7.879 -/* calculate output of a standard 2 operator channel 7.880 - (or 1st part of a 4-op channel) */ 7.881 -INLINE void chan_calc( OPL3_CH *CH ) 7.882 -{ 7.883 - OPL3_SLOT *SLOT; 7.884 - unsigned int env; 7.885 - signed int out; 7.886 - 7.887 - phase_modulation = 0; 7.888 - phase_modulation2= 0; 7.889 - 7.890 - /* SLOT 1 */ 7.891 - SLOT = &CH->SLOT[SLOT1]; 7.892 - env = volume_calc(SLOT); 7.893 - out = SLOT->op1_out[0] + SLOT->op1_out[1]; 7.894 - SLOT->op1_out[0] = SLOT->op1_out[1]; 7.895 - SLOT->op1_out[1] = 0; 7.896 - if( env < ENV_QUIET ) 7.897 - { 7.898 - if (!SLOT->FB) 7.899 - out = 0; 7.900 - SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable ); 7.901 - } 7.902 - *SLOT->connect += SLOT->op1_out[1]; 7.903 -//logerror("out0=%5i vol0=%4i ", SLOT->op1_out[1], env ); 7.904 - 7.905 - /* SLOT 2 */ 7.906 - SLOT++; 7.907 - env = volume_calc(SLOT); 7.908 - if( env < ENV_QUIET ) 7.909 - *SLOT->connect += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable); 7.910 - 7.911 -//logerror("out1=%5i vol1=%4i\n", op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable), env ); 7.912 - 7.913 -} 7.914 - 7.915 -/* calculate output of a 2nd part of 4-op channel */ 7.916 -INLINE void chan_calc_ext( OPL3_CH *CH ) 7.917 -{ 7.918 - OPL3_SLOT *SLOT; 7.919 - unsigned int env; 7.920 - 7.921 - phase_modulation = 0; 7.922 - 7.923 - /* SLOT 1 */ 7.924 - SLOT = &CH->SLOT[SLOT1]; 7.925 - env = volume_calc(SLOT); 7.926 - if( env < ENV_QUIET ) 7.927 - *SLOT->connect += op_calc(SLOT->Cnt, env, phase_modulation2, SLOT->wavetable ); 7.928 - 7.929 - /* SLOT 2 */ 7.930 - SLOT++; 7.931 - env = volume_calc(SLOT); 7.932 - if( env < ENV_QUIET ) 7.933 - *SLOT->connect += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable); 7.934 - 7.935 -} 7.936 - 7.937 -/* 7.938 - operators used in the rhythm sounds generation process: 7.939 - 7.940 - Envelope Generator: 7.941 - 7.942 -channel operator register number Bass High Snare Tom Top 7.943 -/ slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal 7.944 - 6 / 0 12 50 70 90 f0 + 7.945 - 6 / 1 15 53 73 93 f3 + 7.946 - 7 / 0 13 51 71 91 f1 + 7.947 - 7 / 1 16 54 74 94 f4 + 7.948 - 8 / 0 14 52 72 92 f2 + 7.949 - 8 / 1 17 55 75 95 f5 + 7.950 - 7.951 - Phase Generator: 7.952 - 7.953 -channel operator register number Bass High Snare Tom Top 7.954 -/ slot number MULTIPLE Drum Hat Drum Tom Cymbal 7.955 - 6 / 0 12 30 + 7.956 - 6 / 1 15 33 + 7.957 - 7 / 0 13 31 + + + 7.958 - 7 / 1 16 34 ----- n o t u s e d ----- 7.959 - 8 / 0 14 32 + 7.960 - 8 / 1 17 35 + + 7.961 - 7.962 -channel operator register number Bass High Snare Tom Top 7.963 -number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal 7.964 - 6 12,15 B6 A6 + 7.965 - 7.966 - 7 13,16 B7 A7 + + + 7.967 - 7.968 - 8 14,17 B8 A8 + + + 7.969 - 7.970 -*/ 7.971 - 7.972 -/* calculate rhythm */ 7.973 - 7.974 -INLINE void chan_calc_rhythm( OPL3_CH *CH, unsigned int noise ) 7.975 -{ 7.976 - OPL3_SLOT *SLOT; 7.977 - signed int out; 7.978 - unsigned int env; 7.979 - 7.980 - 7.981 - /* Bass Drum (verified on real YM3812): 7.982 - - depends on the channel 6 'connect' register: 7.983 - when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out) 7.984 - when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored 7.985 - - output sample always is multiplied by 2 7.986 - */ 7.987 - 7.988 - phase_modulation = 0; 7.989 - 7.990 - /* SLOT 1 */ 7.991 - SLOT = &CH[6].SLOT[SLOT1]; 7.992 - env = volume_calc(SLOT); 7.993 - 7.994 - out = SLOT->op1_out[0] + SLOT->op1_out[1]; 7.995 - SLOT->op1_out[0] = SLOT->op1_out[1]; 7.996 - 7.997 - if (!SLOT->CON) 7.998 - phase_modulation = SLOT->op1_out[0]; 7.999 - //else ignore output of operator 1 7.1000 - 7.1001 - SLOT->op1_out[1] = 0; 7.1002 - if( env < ENV_QUIET ) 7.1003 - { 7.1004 - if (!SLOT->FB) 7.1005 - out = 0; 7.1006 - SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable ); 7.1007 - } 7.1008 - 7.1009 - /* SLOT 2 */ 7.1010 - SLOT++; 7.1011 - env = volume_calc(SLOT); 7.1012 - if( env < ENV_QUIET ) 7.1013 - chanout[6] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2; 7.1014 - 7.1015 - 7.1016 - /* Phase generation is based on: */ 7.1017 - // HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) 7.1018 - // SD (16) channel 7->slot 1 7.1019 - // TOM (14) channel 8->slot 1 7.1020 - // TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) 7.1021 - 7.1022 - /* Envelope generation based on: */ 7.1023 - // HH channel 7->slot1 7.1024 - // SD channel 7->slot2 7.1025 - // TOM channel 8->slot1 7.1026 - // TOP channel 8->slot2 7.1027 - 7.1028 - 7.1029 - /* The following formulas can be well optimized. 7.1030 - I leave them in direct form for now (in case I've missed something). 7.1031 - */ 7.1032 - 7.1033 - /* High Hat (verified on real YM3812) */ 7.1034 - env = volume_calc(SLOT7_1); 7.1035 - if( env < ENV_QUIET ) 7.1036 - { 7.1037 - 7.1038 - /* high hat phase generation: 7.1039 - phase = d0 or 234 (based on frequency only) 7.1040 - phase = 34 or 2d0 (based on noise) 7.1041 - */ 7.1042 - 7.1043 - /* base frequency derived from operator 1 in channel 7 */ 7.1044 - unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1; 7.1045 - unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1; 7.1046 - unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1; 7.1047 - 7.1048 - unsigned char res1 = (bit2 ^ bit7) | bit3; 7.1049 - 7.1050 - /* when res1 = 0 phase = 0x000 | 0xd0; */ 7.1051 - /* when res1 = 1 phase = 0x200 | (0xd0>>2); */ 7.1052 - UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0; 7.1053 - 7.1054 - /* enable gate based on frequency of operator 2 in channel 8 */ 7.1055 - unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1; 7.1056 - unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1; 7.1057 - 7.1058 - unsigned char res2 = (bit3e ^ bit5e); 7.1059 - 7.1060 - /* when res2 = 0 pass the phase from calculation above (res1); */ 7.1061 - /* when res2 = 1 phase = 0x200 | (0xd0>>2); */ 7.1062 - if (res2) 7.1063 - phase = (0x200|(0xd0>>2)); 7.1064 - 7.1065 - 7.1066 - /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */ 7.1067 - /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */ 7.1068 - if (phase&0x200) 7.1069 - { 7.1070 - if (noise) 7.1071 - phase = 0x200|0xd0; 7.1072 - } 7.1073 - else 7.1074 - /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */ 7.1075 - /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */ 7.1076 - { 7.1077 - if (noise) 7.1078 - phase = 0xd0>>2; 7.1079 - } 7.1080 - 7.1081 - chanout[7] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2; 7.1082 - } 7.1083 - 7.1084 - /* Snare Drum (verified on real YM3812) */ 7.1085 - env = volume_calc(SLOT7_2); 7.1086 - if( env < ENV_QUIET ) 7.1087 - { 7.1088 - /* base frequency derived from operator 1 in channel 7 */ 7.1089 - unsigned char bit8 = ((SLOT7_1->Cnt>>FREQ_SH)>>8)&1; 7.1090 - 7.1091 - /* when bit8 = 0 phase = 0x100; */ 7.1092 - /* when bit8 = 1 phase = 0x200; */ 7.1093 - UINT32 phase = bit8 ? 0x200 : 0x100; 7.1094 - 7.1095 - /* Noise bit XOR'es phase by 0x100 */ 7.1096 - /* when noisebit = 0 pass the phase from calculation above */ 7.1097 - /* when noisebit = 1 phase ^= 0x100; */ 7.1098 - /* in other words: phase ^= (noisebit<<8); */ 7.1099 - if (noise) 7.1100 - phase ^= 0x100; 7.1101 - 7.1102 - chanout[7] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2; 7.1103 - } 7.1104 - 7.1105 - /* Tom Tom (verified on real YM3812) */ 7.1106 - env = volume_calc(SLOT8_1); 7.1107 - if( env < ENV_QUIET ) 7.1108 - chanout[8] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2; 7.1109 - 7.1110 - /* Top Cymbal (verified on real YM3812) */ 7.1111 - env = volume_calc(SLOT8_2); 7.1112 - if( env < ENV_QUIET ) 7.1113 - { 7.1114 - /* base frequency derived from operator 1 in channel 7 */ 7.1115 - unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1; 7.1116 - unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1; 7.1117 - unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1; 7.1118 - 7.1119 - unsigned char res1 = (bit2 ^ bit7) | bit3; 7.1120 - 7.1121 - /* when res1 = 0 phase = 0x000 | 0x100; */ 7.1122 - /* when res1 = 1 phase = 0x200 | 0x100; */ 7.1123 - UINT32 phase = res1 ? 0x300 : 0x100; 7.1124 - 7.1125 - /* enable gate based on frequency of operator 2 in channel 8 */ 7.1126 - unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1; 7.1127 - unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1; 7.1128 - 7.1129 - unsigned char res2 = (bit3e ^ bit5e); 7.1130 - /* when res2 = 0 pass the phase from calculation above (res1); */ 7.1131 - /* when res2 = 1 phase = 0x200 | 0x100; */ 7.1132 - if (res2) 7.1133 - phase = 0x300; 7.1134 - 7.1135 - chanout[8] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2; 7.1136 - } 7.1137 - 7.1138 -} 7.1139 - 7.1140 - 7.1141 -/* generic table initialize */ 7.1142 -static int init_tables(void) 7.1143 -{ 7.1144 - signed int i,x; 7.1145 - signed int n; 7.1146 - double o,m; 7.1147 - 7.1148 - 7.1149 - for (x=0; x<TL_RES_LEN; x++) 7.1150 - { 7.1151 - m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0); 7.1152 - m = floor(m); 7.1153 - 7.1154 - /* we never reach (1<<16) here due to the (x+1) */ 7.1155 - /* result fits within 16 bits at maximum */ 7.1156 - 7.1157 - n = (int)m; /* 16 bits here */ 7.1158 - n >>= 4; /* 12 bits here */ 7.1159 - if (n&1) /* round to nearest */ 7.1160 - n = (n>>1)+1; 7.1161 - else 7.1162 - n = n>>1; 7.1163 - /* 11 bits here (rounded) */ 7.1164 - n <<= 1; /* 12 bits here (as in real chip) */ 7.1165 - tl_tab[ x*2 + 0 ] = n; 7.1166 - tl_tab[ x*2 + 1 ] = ~tl_tab[ x*2 + 0 ]; /* this *is* different from OPL2 (verified on real YMF262) */ 7.1167 - 7.1168 - for (i=1; i<13; i++) 7.1169 - { 7.1170 - tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i; 7.1171 - tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = ~tl_tab[ x*2+0 + i*2*TL_RES_LEN ]; /* this *is* different from OPL2 (verified on real YMF262) */ 7.1172 - } 7.1173 - #if 0 7.1174 - logerror("tl %04i", x*2); 7.1175 - for (i=0; i<13; i++) 7.1176 - logerror(", [%02i] %5i", i*2, tl_tab[ x*2 +0 + i*2*TL_RES_LEN ] ); /* positive */ 7.1177 - logerror("\n"); 7.1178 - 7.1179 - logerror("tl %04i", x*2); 7.1180 - for (i=0; i<13; i++) 7.1181 - logerror(", [%02i] %5i", i*2, tl_tab[ x*2 +1 + i*2*TL_RES_LEN ] ); /* negative */ 7.1182 - logerror("\n"); 7.1183 - #endif 7.1184 - } 7.1185 - 7.1186 - for (i=0; i<SIN_LEN; i++) 7.1187 - { 7.1188 - /* non-standard sinus */ 7.1189 - m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* checked against the real chip */ 7.1190 - 7.1191 - /* we never reach zero here due to ((i*2)+1) */ 7.1192 - 7.1193 - if (m>0.0) 7.1194 - o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */ 7.1195 - else 7.1196 - o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */ 7.1197 - 7.1198 - o = o / (ENV_STEP/4); 7.1199 - 7.1200 - n = (int)(2.0*o); 7.1201 - if (n&1) /* round to nearest */ 7.1202 - n = (n>>1)+1; 7.1203 - else 7.1204 - n = n>>1; 7.1205 - 7.1206 - sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 ); 7.1207 - 7.1208 - /*logerror("YMF262.C: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/ 7.1209 - } 7.1210 - 7.1211 - for (i=0; i<SIN_LEN; i++) 7.1212 - { 7.1213 - /* these 'pictures' represent _two_ cycles */ 7.1214 - /* waveform 1: __ __ */ 7.1215 - /* / \____/ \____*/ 7.1216 - /* output only first half of the sinus waveform (positive one) */ 7.1217 - 7.1218 - if (i & (1<<(SIN_BITS-1)) ) 7.1219 - sin_tab[1*SIN_LEN+i] = TL_TAB_LEN; 7.1220 - else 7.1221 - sin_tab[1*SIN_LEN+i] = sin_tab[i]; 7.1222 - 7.1223 - /* waveform 2: __ __ __ __ */ 7.1224 - /* / \/ \/ \/ \*/ 7.1225 - /* abs(sin) */ 7.1226 - 7.1227 - sin_tab[2*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>1) ]; 7.1228 - 7.1229 - /* waveform 3: _ _ _ _ */ 7.1230 - /* / |_/ |_/ |_/ |_*/ 7.1231 - /* abs(output only first quarter of the sinus waveform) */ 7.1232 - 7.1233 - if (i & (1<<(SIN_BITS-2)) ) 7.1234 - sin_tab[3*SIN_LEN+i] = TL_TAB_LEN; 7.1235 - else 7.1236 - sin_tab[3*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>2)]; 7.1237 - 7.1238 - /* waveform 4: */ 7.1239 - /* /\ ____/\ ____*/ 7.1240 - /* \/ \/ */ 7.1241 - /* output whole sinus waveform in half the cycle(step=2) and output 0 on the other half of cycle */ 7.1242 - 7.1243 - if (i & (1<<(SIN_BITS-1)) ) 7.1244 - sin_tab[4*SIN_LEN+i] = TL_TAB_LEN; 7.1245 - else 7.1246 - sin_tab[4*SIN_LEN+i] = sin_tab[i*2]; 7.1247 - 7.1248 - /* waveform 5: */ 7.1249 - /* /\/\____/\/\____*/ 7.1250 - /* */ 7.1251 - /* output abs(whole sinus) waveform in half the cycle(step=2) and output 0 on the other half of cycle */ 7.1252 - 7.1253 - if (i & (1<<(SIN_BITS-1)) ) 7.1254 - sin_tab[5*SIN_LEN+i] = TL_TAB_LEN; 7.1255 - else 7.1256 - sin_tab[5*SIN_LEN+i] = sin_tab[(i*2) & (SIN_MASK>>1) ]; 7.1257 - 7.1258 - /* waveform 6: ____ ____ */ 7.1259 - /* */ 7.1260 - /* ____ ____*/ 7.1261 - /* output maximum in half the cycle and output minimum on the other half of cycle */ 7.1262 - 7.1263 - if (i & (1<<(SIN_BITS-1)) ) 7.1264 - sin_tab[6*SIN_LEN+i] = 1; /* negative */ 7.1265 - else 7.1266 - sin_tab[6*SIN_LEN+i] = 0; /* positive */ 7.1267 - 7.1268 - /* waveform 7: */ 7.1269 - /* |\____ |\____ */ 7.1270 - /* \| \|*/ 7.1271 - /* output sawtooth waveform */ 7.1272 - 7.1273 - if (i & (1<<(SIN_BITS-1)) ) 7.1274 - x = ((SIN_LEN-1)-i)*16 + 1; /* negative: from 8177 to 1 */ 7.1275 - else 7.1276 - x = i*16; /*positive: from 0 to 8176 */ 7.1277 - 7.1278 - if (x > TL_TAB_LEN) 7.1279 - x = TL_TAB_LEN; /* clip to the allowed range */ 7.1280 - 7.1281 - sin_tab[7*SIN_LEN+i] = x; 7.1282 - 7.1283 - //logerror("YMF262.C: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] ); 7.1284 - //logerror("YMF262.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] ); 7.1285 - //logerror("YMF262.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] ); 7.1286 - //logerror("YMF262.C: sin4[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[4*SIN_LEN+i], tl_tab[sin_tab[4*SIN_LEN+i]] ); 7.1287 - //logerror("YMF262.C: sin5[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[5*SIN_LEN+i], tl_tab[sin_tab[5*SIN_LEN+i]] ); 7.1288 - //logerror("YMF262.C: sin6[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[6*SIN_LEN+i], tl_tab[sin_tab[6*SIN_LEN+i]] ); 7.1289 - //logerror("YMF262.C: sin7[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[7*SIN_LEN+i], tl_tab[sin_tab[7*SIN_LEN+i]] ); 7.1290 - } 7.1291 - /*logerror("YMF262.C: ENV_QUIET= %08x (dec*8=%i)\n", ENV_QUIET, ENV_QUIET*8 );*/ 7.1292 - 7.1293 -#ifdef SAVE_SAMPLE 7.1294 - sample[0]=fopen("sampsum.pcm","wb"); 7.1295 -#endif 7.1296 - 7.1297 - return 1; 7.1298 -} 7.1299 - 7.1300 -static void OPLCloseTable( void ) 7.1301 -{ 7.1302 -#ifdef SAVE_SAMPLE 7.1303 - fclose(sample[0]); 7.1304 -#endif 7.1305 -} 7.1306 - 7.1307 - 7.1308 - 7.1309 -static void OPL3_initalize(OPL3 *chip) 7.1310 -{ 7.1311 - int i; 7.1312 - 7.1313 - /* frequency base */ 7.1314 - chip->freqbase = (chip->rate) ? ((double)chip->clock / (8.0*36)) / chip->rate : 0; 7.1315 -#if 0 7.1316 - chip->rate = (double)chip->clock / (8.0*36); 7.1317 - chip->freqbase = 1.0; 7.1318 -#endif 7.1319 - 7.1320 - /* logerror("YMF262: freqbase=%f\n", chip->freqbase); */ 7.1321 - 7.1322 - /* Timer base time */ 7.1323 - chip->TimerBase = attotime_mul(ATTOTIME_IN_HZ(chip->clock), 8*36); 7.1324 - 7.1325 - /* make fnumber -> increment counter table */ 7.1326 - for( i=0 ; i < 1024 ; i++ ) 7.1327 - { 7.1328 - /* opn phase increment counter = 20bit */ 7.1329 - chip->fn_tab[i] = (UINT32)( (double)i * 64 * chip->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */ 7.1330 -#if 0 7.1331 - logerror("YMF262.C: fn_tab[%4i] = %08x (dec=%8i)\n", 7.1332 - i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 ); 7.1333 -#endif 7.1334 - } 7.1335 - 7.1336 -#if 0 7.1337 - for( i=0 ; i < 16 ; i++ ) 7.1338 - { 7.1339 - logerror("YMF262.C: sl_tab[%i] = %08x\n", 7.1340 - i, sl_tab[i] ); 7.1341 - } 7.1342 - for( i=0 ; i < 8 ; i++ ) 7.1343 - { 7.1344 - int j; 7.1345 - logerror("YMF262.C: ksl_tab[oct=%2i] =",i); 7.1346 - for (j=0; j<16; j++) 7.1347 - { 7.1348 - logerror("%08x ", ksl_tab[i*16+j] ); 7.1349 - } 7.1350 - logerror("\n"); 7.1351 - } 7.1352 -#endif 7.1353 - 7.1354 - 7.1355 - /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */ 7.1356 - /* One entry from LFO_AM_TABLE lasts for 64 samples */ 7.1357 - chip->lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * chip->freqbase; 7.1358 - 7.1359 - /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */ 7.1360 - chip->lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * chip->freqbase; 7.1361 - 7.1362 - /*logerror ("chip->lfo_am_inc = %8x ; chip->lfo_pm_inc = %8x\n", chip->lfo_am_inc, chip->lfo_pm_inc);*/ 7.1363 - 7.1364 - /* Noise generator: a step takes 1 sample */ 7.1365 - chip->noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * chip->freqbase; 7.1366 - 7.1367 - chip->eg_timer_add = (1<<EG_SH) * chip->freqbase; 7.1368 - chip->eg_timer_overflow = ( 1 ) * (1<<EG_SH); 7.1369 - /*logerror("YMF262init eg_timer_add=%8x eg_timer_overflow=%8x\n", chip->eg_timer_add, chip->eg_timer_overflow);*/ 7.1370 - 7.1371 -} 7.1372 - 7.1373 -INLINE void FM_KEYON(OPL3_SLOT *SLOT, UINT32 key_set) 7.1374 -{ 7.1375 - if( !SLOT->key ) 7.1376 - { 7.1377 - /* restart Phase Generator */ 7.1378 - SLOT->Cnt = 0; 7.1379 - /* phase -> Attack */ 7.1380 - SLOT->state = EG_ATT; 7.1381 - } 7.1382 - SLOT->key |= key_set; 7.1383 -} 7.1384 - 7.1385 -INLINE void FM_KEYOFF(OPL3_SLOT *SLOT, UINT32 key_clr) 7.1386 -{ 7.1387 - if( SLOT->key ) 7.1388 - { 7.1389 - SLOT->key &= key_clr; 7.1390 - 7.1391 - if( !SLOT->key ) 7.1392 - { 7.1393 - /* phase -> Release */ 7.1394 - if (SLOT->state>EG_REL) 7.1395 - SLOT->state = EG_REL; 7.1396 - } 7.1397 - } 7.1398 -} 7.1399 - 7.1400 -/* update phase increment counter of operator (also update the EG rates if necessary) */ 7.1401 -INLINE void CALC_FCSLOT(OPL3_CH *CH,OPL3_SLOT *SLOT) 7.1402 -{ 7.1403 - int ksr; 7.1404 - 7.1405 - /* (frequency) phase increment counter */ 7.1406 - SLOT->Incr = CH->fc * SLOT->mul; 7.1407 - ksr = CH->kcode >> SLOT->KSR; 7.1408 - 7.1409 - if( SLOT->ksr != ksr ) 7.1410 - { 7.1411 - SLOT->ksr = ksr; 7.1412 - 7.1413 - /* calculate envelope generator rates */ 7.1414 - if ((SLOT->ar + SLOT->ksr) < 16+60) 7.1415 - { 7.1416 - SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; 7.1417 - SLOT->eg_m_ar = (1<<SLOT->eg_sh_ar)-1; 7.1418 - SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; 7.1419 - } 7.1420 - else 7.1421 - { 7.1422 - SLOT->eg_sh_ar = 0; 7.1423 - SLOT->eg_m_ar = (1<<SLOT->eg_sh_ar)-1; 7.1424 - SLOT->eg_sel_ar = 13*RATE_STEPS; 7.1425 - } 7.1426 - SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; 7.1427 - SLOT->eg_m_dr = (1<<SLOT->eg_sh_dr)-1; 7.1428 - SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; 7.1429 - SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; 7.1430 - SLOT->eg_m_rr = (1<<SLOT->eg_sh_rr)-1; 7.1431 - SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; 7.1432 - } 7.1433 -} 7.1434 - 7.1435 -/* set multi,am,vib,EG-TYP,KSR,mul */ 7.1436 -INLINE void set_mul(OPL3 *chip,int slot,int v) 7.1437 -{ 7.1438 - OPL3_CH *CH = &chip->P_CH[slot/2]; 7.1439 - OPL3_SLOT *SLOT = &CH->SLOT[slot&1]; 7.1440 - 7.1441 - SLOT->mul = mul_tab[v&0x0f]; 7.1442 - SLOT->KSR = (v&0x10) ? 0 : 2; 7.1443 - SLOT->eg_type = (v&0x20); 7.1444 - SLOT->vib = (v&0x40); 7.1445 - SLOT->AMmask = (v&0x80) ? ~0 : 0; 7.1446 - 7.1447 - if (chip->OPL3_mode & 1) 7.1448 - { 7.1449 - int chan_no = slot/2; 7.1450 - 7.1451 - /* in OPL3 mode */ 7.1452 - //DO THIS: 7.1453 - //if this is one of the slots of 1st channel forming up a 4-op channel 7.1454 - //do normal operation 7.1455 - //else normal 2 operator function 7.1456 - //OR THIS: 7.1457 - //if this is one of the slots of 2nd channel forming up a 4-op channel 7.1458 - //update it using channel data of 1st channel of a pair 7.1459 - //else normal 2 operator function 7.1460 - switch(chan_no) 7.1461 - { 7.1462 - case 0: case 1: case 2: 7.1463 - case 9: case 10: case 11: 7.1464 - if (CH->extended) 7.1465 - { 7.1466 - /* normal */ 7.1467 - CALC_FCSLOT(CH,SLOT); 7.1468 - } 7.1469 - else 7.1470 - { 7.1471 - /* normal */ 7.1472 - CALC_FCSLOT(CH,SLOT); 7.1473 - } 7.1474 - break; 7.1475 - case 3: case 4: case 5: 7.1476 - case 12: case 13: case 14: 7.1477 - if ((CH-3)->extended) 7.1478 - { 7.1479 - /* update this SLOT using frequency data for 1st channel of a pair */ 7.1480 - CALC_FCSLOT(CH-3,SLOT); 7.1481 - } 7.1482 - else 7.1483 - { 7.1484 - /* normal */ 7.1485 - CALC_FCSLOT(CH,SLOT); 7.1486 - } 7.1487 - break; 7.1488 - default: 7.1489 - /* normal */ 7.1490 - CALC_FCSLOT(CH,SLOT); 7.1491 - break; 7.1492 - } 7.1493 - } 7.1494 - else 7.1495 - { 7.1496 - /* in OPL2 mode */ 7.1497 - CALC_FCSLOT(CH,SLOT); 7.1498 - } 7.1499 -} 7.1500 - 7.1501 -/* set ksl & tl */ 7.1502 -INLINE void set_ksl_tl(OPL3 *chip,int slot,int v) 7.1503 -{ 7.1504 - OPL3_CH *CH = &chip->P_CH[slot/2]; 7.1505 - OPL3_SLOT *SLOT = &CH->SLOT[slot&1]; 7.1506 - 7.1507 - int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */ 7.1508 - 7.1509 - SLOT->ksl = ksl ? 3-ksl : 31; 7.1510 - SLOT->TL = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */ 7.1511 - 7.1512 - if (chip->OPL3_mode & 1) 7.1513 - { 7.1514 - int chan_no = slot/2; 7.1515 - 7.1516 - /* in OPL3 mode */ 7.1517 - //DO THIS: 7.1518 - //if this is one of the slots of 1st channel forming up a 4-op channel 7.1519 - //do normal operation 7.1520 - //else normal 2 operator function 7.1521 - //OR THIS: 7.1522 - //if this is one of the slots of 2nd channel forming up a 4-op channel 7.1523 - //update it using channel data of 1st channel of a pair 7.1524 - //else normal 2 operator function 7.1525 - switch(chan_no) 7.1526 - { 7.1527 - case 0: case 1: case 2: 7.1528 - case 9: case 10: case 11: 7.1529 - if (CH->extended) 7.1530 - { 7.1531 - /* normal */ 7.1532 - SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 7.1533 - } 7.1534 - else 7.1535 - { 7.1536 - /* normal */ 7.1537 - SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 7.1538 - } 7.1539 - break; 7.1540 - case 3: case 4: case 5: 7.1541 - case 12: case 13: case 14: 7.1542 - if ((CH-3)->extended) 7.1543 - { 7.1544 - /* update this SLOT using frequency data for 1st channel of a pair */ 7.1545 - SLOT->TLL = SLOT->TL + ((CH-3)->ksl_base>>SLOT->ksl); 7.1546 - } 7.1547 - else 7.1548 - { 7.1549 - /* normal */ 7.1550 - SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 7.1551 - } 7.1552 - break; 7.1553 - default: 7.1554 - /* normal */ 7.1555 - SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 7.1556 - break; 7.1557 - } 7.1558 - } 7.1559 - else 7.1560 - { 7.1561 - /* in OPL2 mode */ 7.1562 - SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 7.1563 - } 7.1564 - 7.1565 -} 7.1566 - 7.1567 -/* set attack rate & decay rate */ 7.1568 -INLINE void set_ar_dr(OPL3 *chip,int slot,int v) 7.1569 -{ 7.1570 - OPL3_CH *CH = &chip->P_CH[slot/2]; 7.1571 - OPL3_SLOT *SLOT = &CH->SLOT[slot&1]; 7.1572 - 7.1573 - SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0; 7.1574 - 7.1575 - if ((SLOT->ar + SLOT->ksr) < 16+60) /* verified on real YMF262 - all 15 x rates take "zero" time */ 7.1576 - { 7.1577 - SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; 7.1578 - SLOT->eg_m_ar = (1<<SLOT->eg_sh_ar)-1; 7.1579 - SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; 7.1580 - } 7.1581 - else 7.1582 - { 7.1583 - SLOT->eg_sh_ar = 0; 7.1584 - SLOT->eg_m_ar = (1<<SLOT->eg_sh_ar)-1; 7.1585 - SLOT->eg_sel_ar = 13*RATE_STEPS; 7.1586 - } 7.1587 - 7.1588 - SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0; 7.1589 - SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; 7.1590 - SLOT->eg_m_dr = (1<<SLOT->eg_sh_dr)-1; 7.1591 - SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; 7.1592 -} 7.1593 - 7.1594 -/* set sustain level & release rate */ 7.1595 -INLINE void set_sl_rr(OPL3 *chip,int slot,int v) 7.1596 -{ 7.1597 - OPL3_CH *CH = &chip->P_CH[slot/2]; 7.1598 - OPL3_SLOT *SLOT = &CH->SLOT[slot&1]; 7.1599 - 7.1600 - SLOT->sl = sl_tab[ v>>4 ]; 7.1601 - 7.1602 - SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0; 7.1603 - SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; 7.1604 - SLOT->eg_m_rr = (1<<SLOT->eg_sh_rr)-1; 7.1605 - SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; 7.1606 -} 7.1607 - 7.1608 - 7.1609 -static void update_channels(OPL3 *chip, OPL3_CH *CH) 7.1610 -{ 7.1611 - /* update channel passed as a parameter and a channel at CH+=3; */ 7.1612 - if (CH->extended) 7.1613 - { /* we've just switched to combined 4 operator mode */ 7.1614 - 7.1615 - } 7.1616 - else 7.1617 - { /* we've just switched to normal 2 operator mode */ 7.1618 - 7.1619 - } 7.1620 - 7.1621 -} 7.1622 - 7.1623 -/* write a value v to register r on OPL chip */ 7.1624 -static void OPL3WriteReg(OPL3 *chip, int r, int v) 7.1625 -{ 7.1626 - OPL3_CH *CH; 7.1627 - unsigned int ch_offset = 0; 7.1628 - int slot; 7.1629 - int block_fnum; 7.1630 - 7.1631 - 7.1632 - 7.1633 - if (LOG_CYM_FILE && (cymfile) && ((r&255)!=0) && (r!=255) ) 7.1634 - { 7.1635 - if (r>0xff) 7.1636 - fputc( (unsigned char)0xff, cymfile );/*mark writes to second register set*/ 7.1637 - 7.1638 - fputc( (unsigned char)r&0xff, cymfile ); 7.1639 - fputc( (unsigned char)v, cymfile ); 7.1640 - } 7.1641 - 7.1642 - if(r&0x100) 7.1643 - { 7.1644 - switch(r) 7.1645 - { 7.1646 - case 0x101: /* test register */ 7.1647 - return; 7.1648 - 7.1649 - case 0x104: /* 6 channels enable */ 7.1650 - { 7.1651 - UINT8 prev; 7.1652 - 7.1653 - CH = &chip->P_CH[0]; /* channel 0 */ 7.1654 - prev = CH->extended; 7.1655 - CH->extended = (v>>0) & 1; 7.1656 - if(prev != CH->extended) 7.1657 - update_channels(chip, CH); 7.1658 - CH++; /* channel 1 */ 7.1659 - prev = CH->extended; 7.1660 - CH->extended = (v>>1) & 1; 7.1661 - if(prev != CH->extended) 7.1662 - update_channels(chip, CH); 7.1663 - CH++; /* channel 2 */ 7.1664 - prev = CH->extended; 7.1665 - CH->extended = (v>>2) & 1; 7.1666 - if(prev != CH->extended) 7.1667 - update_channels(chip, CH); 7.1668 - 7.1669 - 7.1670 - CH = &chip->P_CH[9]; /* channel 9 */ 7.1671 - prev = CH->extended; 7.1672 - CH->extended = (v>>3) & 1; 7.1673 - if(prev != CH->extended) 7.1674 - update_channels(chip, CH); 7.1675 - CH++; /* channel 10 */ 7.1676 - prev = CH->extended; 7.1677 - CH->extended = (v>>4) & 1; 7.1678 - if(prev != CH->extended) 7.1679 - update_channels(chip, CH); 7.1680 - CH++; /* channel 11 */ 7.1681 - prev = CH->extended; 7.1682 - CH->extended = (v>>5) & 1; 7.1683 - if(prev != CH->extended) 7.1684 - update_channels(chip, CH); 7.1685 - 7.1686 - } 7.1687 - return; 7.1688 - 7.1689 - case 0x105: /* OPL3 extensions enable register */ 7.1690 - 7.1691 - chip->OPL3_mode = v&0x01; /* OPL3 mode when bit0=1 otherwise it is OPL2 mode */ 7.1692 - 7.1693 - /* following behaviour was tested on real YMF262, 7.1694 - switching OPL3/OPL2 modes on the fly: 7.1695 - - does not change the waveform previously selected (unless when ....) 7.1696 - - does not update CH.A, CH.B, CH.C and CH.D output selectors (registers c0-c8) (unless when ....) 7.1697 - - does not disable channels 9-17 on OPL3->OPL2 switch 7.1698 - - does not switch 4 operator channels back to 2 operator channels 7.1699 - */ 7.1700 - 7.1701 - return; 7.1702 - 7.1703 - default: 7.1704 - if (r < 0x120) 7.1705 - pclog("YMF262: write to unknown register (set#2): %03x value=%02x\n",r,v); 7.1706 - break; 7.1707 - } 7.1708 - 7.1709 - ch_offset = 9; /* register page #2 starts from channel 9 (counting from 0) */ 7.1710 - } 7.1711 - 7.1712 - /* adjust bus to 8 bits */ 7.1713 - r &= 0xff; 7.1714 - v &= 0xff; 7.1715 - 7.1716 - 7.1717 - switch(r&0xe0) 7.1718 - { 7.1719 - case 0x00: /* 00-1f:control */ 7.1720 - switch(r&0x1f) 7.1721 - { 7.1722 - case 0x01: /* test register */ 7.1723 - break; 7.1724 - case 0x02: /* Timer 1 */ 7.1725 - chip->T[0] = (256-v)*4; 7.1726 - break; 7.1727 - case 0x03: /* Timer 2 */ 7.1728 - chip->T[1] = (256-v)*16; 7.1729 - break; 7.1730 - case 0x04: /* IRQ clear / mask and Timer enable */ 7.1731 - if(v&0x80) 7.1732 - { /* IRQ flags clear */ 7.1733 - OPL3_STATUS_RESET(chip,0x60); 7.1734 - } 7.1735 - else 7.1736 - { /* set IRQ mask ,timer enable */ 7.1737 - UINT8 st1 = v & 1; 7.1738 - UINT8 st2 = (v>>1) & 1; 7.1739 - 7.1740 - /* IRQRST,T1MSK,t2MSK,x,x,x,ST2,ST1 */ 7.1741 - OPL3_STATUS_RESET(chip, v & 0x60); 7.1742 - OPL3_STATUSMASK_SET(chip, (~v) & 0x60 ); 7.1743 - 7.1744 - /* timer 2 */ 7.1745 - if(chip->st[1] != st2) 7.1746 - { 7.1747 - attotime period = st2 ? attotime_mul(chip->TimerBase, chip->T[1]) : attotime_zero; 7.1748 - chip->st[1] = st2; 7.1749 - if (chip->timer_handler) (chip->timer_handler)(chip->TimerParam,1,period); 7.1750 - } 7.1751 - /* timer 1 */ 7.1752 - if(chip->st[0] != st1) 7.1753 - { 7.1754 - attotime period = st1 ? attotime_mul(chip->TimerBase, chip->T[0]) : attotime_zero; 7.1755 - chip->st[0] = st1; 7.1756 - if (chip->timer_handler) (chip->timer_handler)(chip->TimerParam,0,period); 7.1757 - } 7.1758 - } 7.1759 - break; 7.1760 - case 0x08: /* x,NTS,x,x, x,x,x,x */ 7.1761 - chip->nts = v; 7.1762 - break; 7.1763 - 7.1764 - default: 7.1765 - pclog("YMF262: write to unknown register: %02x value=%02x\n",r,v); 7.1766 - break; 7.1767 - } 7.1768 - break; 7.1769 - case 0x20: /* am ON, vib ON, ksr, eg_type, mul */ 7.1770 - slot = slot_array[r&0x1f]; 7.1771 - if(slot < 0) return; 7.1772 - set_mul(chip, slot + ch_offset*2, v); 7.1773 - break; 7.1774 - case 0x40: 7.1775 - slot = slot_array[r&0x1f]; 7.1776 - if(slot < 0) return; 7.1777 - set_ksl_tl(chip, slot + ch_offset*2, v); 7.1778 - break; 7.1779 - case 0x60: 7.1780 - slot = slot_array[r&0x1f]; 7.1781 - if(slot < 0) return; 7.1782 - set_ar_dr(chip, slot + ch_offset*2, v); 7.1783 - break; 7.1784 - case 0x80: 7.1785 - slot = slot_array[r&0x1f]; 7.1786 - if(slot < 0) return; 7.1787 - set_sl_rr(chip, slot + ch_offset*2, v); 7.1788 - break; 7.1789 - case 0xa0: 7.1790 - if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */ 7.1791 - { 7.1792 - if (ch_offset != 0) /* 0xbd register is present in set #1 only */ 7.1793 - return; 7.1794 - 7.1795 - chip->lfo_am_depth = v & 0x80; 7.1796 - chip->lfo_pm_depth_range = (v&0x40) ? 8 : 0; 7.1797 - 7.1798 - chip->rhythm = v&0x3f; 7.1799 - 7.1800 - if(chip->rhythm&0x20) 7.1801 - { 7.1802 - /* BD key on/off */ 7.1803 - if(v&0x10) 7.1804 - { 7.1805 - FM_KEYON (&chip->P_CH[6].SLOT[SLOT1], 2); 7.1806 - FM_KEYON (&chip->P_CH[6].SLOT[SLOT2], 2); 7.1807 - } 7.1808 - else 7.1809 - { 7.1810 - FM_KEYOFF(&chip->P_CH[6].SLOT[SLOT1],~2); 7.1811 - FM_KEYOFF(&chip->P_CH[6].SLOT[SLOT2],~2); 7.1812 - } 7.1813 - /* HH key on/off */ 7.1814 - if(v&0x01) FM_KEYON (&chip->P_CH[7].SLOT[SLOT1], 2); 7.1815 - else FM_KEYOFF(&chip->P_CH[7].SLOT[SLOT1],~2); 7.1816 - /* SD key on/off */ 7.1817 - if(v&0x08) FM_KEYON (&chip->P_CH[7].SLOT[SLOT2], 2); 7.1818 - else FM_KEYOFF(&chip->P_CH[7].SLOT[SLOT2],~2); 7.1819 - /* TOM key on/off */ 7.1820 - if(v&0x04) FM_KEYON (&chip->P_CH[8].SLOT[SLOT1], 2); 7.1821 - else FM_KEYOFF(&chip->P_CH[8].SLOT[SLOT1],~2); 7.1822 - /* TOP-CY key on/off */ 7.1823 - if(v&0x02) FM_KEYON (&chip->P_CH[8].SLOT[SLOT2], 2); 7.1824 - else FM_KEYOFF(&chip->P_CH[8].SLOT[SLOT2],~2); 7.1825 - } 7.1826 - else 7.1827 - { 7.1828 - /* BD key off */ 7.1829 - FM_KEYOFF(&chip->P_CH[6].SLOT[SLOT1],~2); 7.1830 - FM_KEYOFF(&chip->P_CH[6].SLOT[SLOT2],~2); 7.1831 - /* HH key off */ 7.1832 - FM_KEYOFF(&chip->P_CH[7].SLOT[SLOT1],~2); 7.1833 - /* SD key off */ 7.1834 - FM_KEYOFF(&chip->P_CH[7].SLOT[SLOT2],~2); 7.1835 - /* TOM key off */ 7.1836 - FM_KEYOFF(&chip->P_CH[8].SLOT[SLOT1],~2); 7.1837 - /* TOP-CY off */ 7.1838 - FM_KEYOFF(&chip->P_CH[8].SLOT[SLOT2],~2); 7.1839 - } 7.1840 - return; 7.1841 - } 7.1842 - 7.1843 - /* keyon,block,fnum */ 7.1844 - if( (r&0x0f) > 8) return; 7.1845 - CH = &chip->P_CH[(r&0x0f) + ch_offset]; 7.1846 - 7.1847 - if(!(r&0x10)) 7.1848 - { /* a0-a8 */ 7.1849 - block_fnum = (CH->block_fnum&0x1f00) | v; 7.1850 - } 7.1851 - else 7.1852 - { /* b0-b8 */ 7.1853 - block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff); 7.1854 - 7.1855 - if (chip->OPL3_mode & 1) 7.1856 - { 7.1857 - int chan_no = (r&0x0f) + ch_offset; 7.1858 - 7.1859 - /* in OPL3 mode */ 7.1860 - //DO THIS: 7.1861 - //if this is 1st channel forming up a 4-op channel 7.1862 - //ALSO keyon/off slots of 2nd channel forming up 4-op channel 7.1863 - //else normal 2 operator function keyon/off 7.1864 - //OR THIS: 7.1865 - //if this is 2nd channel forming up 4-op channel just do nothing 7.1866 - //else normal 2 operator function keyon/off 7.1867 - switch(chan_no) 7.1868 - { 7.1869 - case 0: case 1: case 2: 7.1870 - case 9: case 10: case 11: 7.1871 - if (CH->extended) 7.1872 - { 7.1873 - //if this is 1st channel forming up a 4-op channel 7.1874 - //ALSO keyon/off slots of 2nd channel forming up 4-op channel 7.1875 - if(v&0x20) 7.1876 - { 7.1877 - FM_KEYON (&CH->SLOT[SLOT1], 1); 7.1878 - FM_KEYON (&CH->SLOT[SLOT2], 1); 7.1879 - FM_KEYON (&(CH+3)->SLOT[SLOT1], 1); 7.1880 - FM_KEYON (&(CH+3)->SLOT[SLOT2], 1); 7.1881 - } 7.1882 - else 7.1883 - { 7.1884 - FM_KEYOFF(&CH->SLOT[SLOT1],~1); 7.1885 - FM_KEYOFF(&CH->SLOT[SLOT2],~1); 7.1886 - FM_KEYOFF(&(CH+3)->SLOT[SLOT1],~1); 7.1887 - FM_KEYOFF(&(CH+3)->SLOT[SLOT2],~1); 7.1888 - } 7.1889 - } 7.1890 - else 7.1891 - { 7.1892 - //else normal 2 operator function keyon/off 7.1893 - if(v&0x20) 7.1894 - { 7.1895 - FM_KEYON (&CH->SLOT[SLOT1], 1); 7.1896 - FM_KEYON (&CH->SLOT[SLOT2], 1); 7.1897 - } 7.1898 - else 7.1899 - { 7.1900 - FM_KEYOFF(&CH->SLOT[SLOT1],~1); 7.1901 - FM_KEYOFF(&CH->SLOT[SLOT2],~1); 7.1902 - } 7.1903 - } 7.1904 - break; 7.1905 - 7.1906 - case 3: case 4: case 5: 7.1907 - case 12: case 13: case 14: 7.1908 - if ((CH-3)->extended) 7.1909 - { 7.1910 - //if this is 2nd channel forming up 4-op channel just do nothing 7.1911 - } 7.1912 - else 7.1913 - { 7.1914 - //else normal 2 operator function keyon/off 7.1915 - if(v&0x20) 7.1916 - { 7.1917 - FM_KEYON (&CH->SLOT[SLOT1], 1); 7.1918 - FM_KEYON (&CH->SLOT[SLOT2], 1); 7.1919 - } 7.1920 - else 7.1921 - { 7.1922 - FM_KEYOFF(&CH->SLOT[SLOT1],~1); 7.1923 - FM_KEYOFF(&CH->SLOT[SLOT2],~1); 7.1924 - } 7.1925 - } 7.1926 - break; 7.1927 - 7.1928 - default: 7.1929 - if(v&0x20) 7.1930 - { 7.1931 - FM_KEYON (&CH->SLOT[SLOT1], 1); 7.1932 - FM_KEYON (&CH->SLOT[SLOT2], 1); 7.1933 - } 7.1934 - else 7.1935 - { 7.1936 - FM_KEYOFF(&CH->SLOT[SLOT1],~1); 7.1937 - FM_KEYOFF(&CH->SLOT[SLOT2],~1); 7.1938 - } 7.1939 - break; 7.1940 - } 7.1941 - } 7.1942 - else 7.1943 - { 7.1944 - if(v&0x20) 7.1945 - { 7.1946 - FM_KEYON (&CH->SLOT[SLOT1], 1); 7.1947 - FM_KEYON (&CH->SLOT[SLOT2], 1); 7.1948 - } 7.1949 - else 7.1950 - { 7.1951 - FM_KEYOFF(&CH->SLOT[SLOT1],~1); 7.1952 - FM_KEYOFF(&CH->SLOT[SLOT2],~1); 7.1953 - } 7.1954 - } 7.1955 - } 7.1956 - /* update */ 7.1957 - if(CH->block_fnum != block_fnum) 7.1958 - { 7.1959 - UINT8 block = block_fnum >> 10; 7.1960 - 7.1961 - CH->block_fnum = block_fnum; 7.1962 - 7.1963 - CH->ksl_base = ksl_tab[block_fnum>>6]; 7.1964 - CH->fc = chip->fn_tab[block_fnum&0x03ff] >> (7-block); 7.1965 - 7.1966 - /* BLK 2,1,0 bits -> bits 3,2,1 of kcode */ 7.1967 - CH->kcode = (CH->block_fnum&0x1c00)>>9; 7.1968 - 7.1969 - /* the info below is actually opposite to what is stated in the Manuals (verifed on real YMF262) */ 7.1970 - /* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum */ 7.1971 - /* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */ 7.1972 - if (chip->nts&0x40) 7.1973 - CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */ 7.1974 - else 7.1975 - CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */ 7.1976 - 7.1977 - if (chip->OPL3_mode & 1) 7.1978 - { 7.1979 - int chan_no = (r&0x0f) + ch_offset; 7.1980 - /* in OPL3 mode */ 7.1981 - //DO THIS: 7.1982 - //if this is 1st channel forming up a 4-op channel 7.1983 - //ALSO update slots of 2nd channel forming up 4-op channel 7.1984 - //else normal 2 operator function keyon/off 7.1985 - //OR THIS: 7.1986 - //if this is 2nd channel forming up 4-op channel just do nothing 7.1987 - //else normal 2 operator function keyon/off 7.1988 - switch(chan_no) 7.1989 - { 7.1990 - case 0: case 1: case 2: 7.1991 - case 9: case 10: case 11: 7.1992 - if (CH->extended) 7.1993 - { 7.1994 - //if this is 1st channel forming up a 4-op channel 7.1995 - //ALSO update slots of 2nd channel forming up 4-op channel 7.1996 - 7.1997 - /* refresh Total Level in FOUR SLOTs of this channel and channel+3 using data from THIS channel */ 7.1998 - CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); 7.1999 - CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); 7.2000 - (CH+3)->SLOT[SLOT1].TLL = (CH+3)->SLOT[SLOT1].TL + (CH->ksl_base>>(CH+3)->SLOT[SLOT1].ksl); 7.2001 - (CH+3)->SLOT[SLOT2].TLL = (CH+3)->SLOT[SLOT2].TL + (CH->ksl_base>>(CH+3)->SLOT[SLOT2].ksl); 7.2002 - 7.2003 - /* refresh frequency counter in FOUR SLOTs of this channel and channel+3 using data from THIS channel */ 7.2004 - CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 7.2005 - CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 7.2006 - CALC_FCSLOT(CH,&(CH+3)->SLOT[SLOT1]); 7.2007 - CALC_FCSLOT(CH,&(CH+3)->SLOT[SLOT2]); 7.2008 - } 7.2009 - else 7.2010 - { 7.2011 - //else normal 2 operator function 7.2012 - /* refresh Total Level in both SLOTs of this channel */ 7.2013 - CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); 7.2014 - CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); 7.2015 - 7.2016 - /* refresh frequency counter in both SLOTs of this channel */ 7.2017 - CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 7.2018 - CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 7.2019 - } 7.2020 - break; 7.2021 - 7.2022 - case 3: case 4: case 5: 7.2023 - case 12: case 13: case 14: 7.2024 - if ((CH-3)->extended) 7.2025 - { 7.2026 - //if this is 2nd channel forming up 4-op channel just do nothing 7.2027 - } 7.2028 - else 7.2029 - { 7.2030 - //else normal 2 operator function 7.2031 - /* refresh Total Level in both SLOTs of this channel */ 7.2032 - CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); 7.2033 - CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); 7.2034 - 7.2035 - /* refresh frequency counter in both SLOTs of this channel */ 7.2036 - CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 7.2037 - CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 7.2038 - } 7.2039 - break; 7.2040 - 7.2041 - default: 7.2042 - /* refresh Total Level in both SLOTs of this channel */ 7.2043 - CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); 7.2044 - CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); 7.2045 - 7.2046 - /* refresh frequency counter in both SLOTs of this channel */ 7.2047 - CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 7.2048 - CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 7.2049 - break; 7.2050 - } 7.2051 - } 7.2052 - else 7.2053 - { 7.2054 - /* in OPL2 mode */ 7.2055 - 7.2056 - /* refresh Total Level in both SLOTs of this channel */ 7.2057 - CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); 7.2058 - CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); 7.2059 - 7.2060 - /* refresh frequency counter in both SLOTs of this channel */ 7.2061 - CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 7.2062 - CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 7.2063 - } 7.2064 - } 7.2065 - break; 7.2066 - 7.2067 - case 0xc0: 7.2068 - /* CH.D, CH.C, CH.B, CH.A, FB(3bits), C */ 7.2069 - if( (r&0xf) > 8) return; 7.2070 - 7.2071 - CH = &chip->P_CH[(r&0xf) + ch_offset]; 7.2072 - 7.2073 - if( chip->OPL3_mode & 1 ) 7.2074 - { 7.2075 - int base = ((r&0xf) + ch_offset) * 4; 7.2076 - 7.2077 - /* OPL3 mode */ 7.2078 - chip->pan[ base ] = (v & 0x10) ? ~0 : 0; /* ch.A */ 7.2079 - chip->pan[ base +1 ] = (v & 0x20) ? ~0 : 0; /* ch.B */ 7.2080 - chip->pan[ base +2 ] = (v & 0x40) ? ~0 : 0; /* ch.C */ 7.2081 - chip->pan[ base +3 ] = (v & 0x80) ? ~0 : 0; /* ch.D */ 7.2082 - } 7.2083 - else 7.2084 - { 7.2085 - int base = ((r&0xf) + ch_offset) * 4; 7.2086 - 7.2087 - /* OPL2 mode - always enabled */ 7.2088 - chip->pan[ base ] = ~0; /* ch.A */ 7.2089 - chip->pan[ base +1 ] = ~0; /* ch.B */ 7.2090 - chip->pan[ base +2 ] = ~0; /* ch.C */ 7.2091 - chip->pan[ base +3 ] = ~0; /* ch.D */ 7.2092 - } 7.2093 - 7.2094 - chip->pan_ctrl_value[ (r&0xf) + ch_offset ] = v; /* store control value for OPL3/OPL2 mode switching on the fly */ 7.2095 - 7.2096 - CH->SLOT[SLOT1].FB = (v>>1)&7 ? ((v>>1)&7) + 7 : 0; 7.2097 - CH->SLOT[SLOT1].CON = v&1; 7.2098 - 7.2099 - if( chip->OPL3_mode & 1 ) 7.2100 - { 7.2101 - int chan_no = (r&0x0f) + ch_offset; 7.2102 - 7.2103 - switch(chan_no) 7.2104 - { 7.2105 - case 0: case 1: case 2: 7.2106 - case 9: case 10: case 11: 7.2107 - if (CH->extended) 7.2108 - { 7.2109 - UINT8 conn = (CH->SLOT[SLOT1].CON<<1) || ((CH+3)->SLOT[SLOT1].CON<<0); 7.2110 - switch(conn) 7.2111 - { 7.2112 - case 0: 7.2113 - /* 1 -> 2 -> 3 -> 4 - out */ 7.2114 - 7.2115 - CH->SLOT[SLOT1].connect = &phase_modulation; 7.2116 - CH->SLOT[SLOT2].connect = &phase_modulation2; 7.2117 - (CH+3)->SLOT[SLOT1].connect = &phase_modulation; 7.2118 - (CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ]; 7.2119 - break; 7.2120 - case 1: 7.2121 - /* 1 -> 2 -\ 7.2122 - 3 -> 4 -+- out */ 7.2123 - 7.2124 - CH->SLOT[SLOT1].connect = &phase_modulation; 7.2125 - CH->SLOT[SLOT2].connect = &chanout[ chan_no ]; 7.2126 - (CH+3)->SLOT[SLOT1].connect = &phase_modulation; 7.2127 - (CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ]; 7.2128 - break; 7.2129 - case 2: 7.2130 - /* 1 -----------\ 7.2131 - 2 -> 3 -> 4 -+- out */ 7.2132 - 7.2133 - CH->SLOT[SLOT1].connect = &chanout[ chan_no ]; 7.2134 - CH->SLOT[SLOT2].connect = &phase_modulation2; 7.2135 - (CH+3)->SLOT[SLOT1].connect = &phase_modulation; 7.2136 - (CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ]; 7.2137 - break; 7.2138 - case 3: 7.2139 - /* 1 ------\ 7.2140 - 2 -> 3 -+- out 7.2141 - 4 ------/ */ 7.2142 - CH->SLOT[SLOT1].connect = &chanout[ chan_no ]; 7.2143 - CH->SLOT[SLOT2].connect = &phase_modulation2; 7.2144 - (CH+3)->SLOT[SLOT1].connect = &chanout[ chan_no + 3 ]; 7.2145 - (CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ]; 7.2146 - break; 7.2147 - } 7.2148 - } 7.2149 - else 7.2150 - { 7.2151 - /* 2 operators mode */ 7.2152 - CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation; 7.2153 - CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset]; 7.2154 - } 7.2155 - break; 7.2156 - 7.2157 - case 3: case 4: case 5: 7.2158 - case 12: case 13: case 14: 7.2159 - if ((CH-3)->extended) 7.2160 - { 7.2161 - UINT8 conn = ((CH-3)->SLOT[SLOT1].CON<<1) || (CH->SLOT[SLOT1].CON<<0); 7.2162 - switch(conn) 7.2163 - { 7.2164 - case 0: 7.2165 - /* 1 -> 2 -> 3 -> 4 - out */ 7.2166 - 7.2167 - (CH-3)->SLOT[SLOT1].connect = &phase_modulation; 7.2168 - (CH-3)->SLOT[SLOT2].connect = &phase_modulation2; 7.2169 - CH->SLOT[SLOT1].connect = &phase_modulation; 7.2170 - CH->SLOT[SLOT2].connect = &chanout[ chan_no ]; 7.2171 - break; 7.2172 - case 1: 7.2173 - /* 1 -> 2 -\ 7.2174 - 3 -> 4 -+- out */ 7.2175 - 7.2176 - (CH-3)->SLOT[SLOT1].connect = &phase_modulation; 7.2177 - (CH-3)->SLOT[SLOT2].connect = &chanout[ chan_no - 3 ]; 7.2178 - CH->SLOT[SLOT1].connect = &phase_modulation; 7.2179 - CH->SLOT[SLOT2].connect = &chanout[ chan_no ]; 7.2180 - break; 7.2181 - case 2: 7.2182 - /* 1 -----------\ 7.2183 - 2 -> 3 -> 4 -+- out */ 7.2184 - 7.2185 - (CH-3)->SLOT[SLOT1].connect = &chanout[ chan_no - 3 ]; 7.2186 - (CH-3)->SLOT[SLOT2].connect = &phase_modulation2; 7.2187 - CH->SLOT[SLOT1].connect = &phase_modulation; 7.2188 - CH->SLOT[SLOT2].connect = &chanout[ chan_no ]; 7.2189 - break; 7.2190 - case 3: 7.2191 - /* 1 ------\ 7.2192 - 2 -> 3 -+- out 7.2193 - 4 ------/ */ 7.2194 - (CH-3)->SLOT[SLOT1].connect = &chanout[ chan_no - 3 ]; 7.2195 - (CH-3)->SLOT[SLOT2].connect = &phase_modulation2; 7.2196 - CH->SLOT[SLOT1].connect = &chanout[ chan_no ]; 7.2197 - CH->SLOT[SLOT2].connect = &chanout[ chan_no ]; 7.2198 - break; 7.2199 - } 7.2200 - } 7.2201 - else 7.2202 - { 7.2203 - /* 2 operators mode */ 7.2204 - CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation; 7.2205 - CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset]; 7.2206 - } 7.2207 - break; 7.2208 - 7.2209 - default: 7.2210 - /* 2 operators mode */ 7.2211 - CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation; 7.2212 - CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset]; 7.2213 - break; 7.2214 - } 7.2215 - } 7.2216 - else 7.2217 - { 7.2218 - /* OPL2 mode - always 2 operators mode */ 7.2219 - CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation; 7.2220 - CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset]; 7.2221 - } 7.2222 - break; 7.2223 - 7.2224 - case 0xe0: /* waveform select */ 7.2225 - slot = slot_array[r&0x1f]; 7.2226 - if(slot < 0) return; 7.2227 - 7.2228 - slot += ch_offset*2; 7.2229 - 7.2230 - CH = &chip->P_CH[slot/2]; 7.2231 - 7.2232 - 7.2233 - /* store 3-bit value written regardless of current OPL2 or OPL3 mode... (verified on real YMF262) */ 7.2234 - v &= 7; 7.2235 - CH->SLOT[slot&1].waveform_number = v; 7.2236 - 7.2237 - /* ... but select only waveforms 0-3 in OPL2 mode */ 7.2238 - if( !(chip->OPL3_mode & 1) ) 7.2239 - { 7.2240 - v &= 3; /* we're in OPL2 mode */ 7.2241 - } 7.2242 - CH->SLOT[slot&1].wavetable = v * SIN_LEN; 7.2243 - break; 7.2244 - } 7.2245 -} 7.2246 - 7.2247 -static TIMER_CALLBACK( cymfile_callback ) 7.2248 -{ 7.2249 - if (cymfile) 7.2250 - { 7.2251 - fputc( (unsigned char)0, cymfile ); 7.2252 - } 7.2253 -} 7.2254 - 7.2255 -/* lock/unlock for common table */ 7.2256 -static int OPL3_LockTable(running_device *device) 7.2257 -{ 7.2258 - num_lock++; 7.2259 - if(num_lock>1) return 0; 7.2260 - 7.2261 - /* first time */ 7.2262 - 7.2263 - cur_chip = NULL; 7.2264 - 7.2265 - if( !init_tables() ) 7.2266 - { 7.2267 - num_lock--; 7.2268 - return -1; 7.2269 - } 7.2270 -#if 0 7.2271 - if (LOG_CYM_FILE) 7.2272 - { 7.2273 - cymfile = fopen("ymf262_.cym","wb"); 7.2274 - if (cymfile) 7.2275 - timer_pulse ( device->machine, ATTOTIME_IN_HZ(110), NULL, 0, cymfile_callback); /*110 Hz pulse timer*/ 7.2276 - else 7.2277 - logerror("Could not create ymf262_.cym file\n"); 7.2278 - } 7.2279 -#endif 7.2280 - return 0; 7.2281 -} 7.2282 - 7.2283 -static void OPL3_UnLockTable(void) 7.2284 -{ 7.2285 - if(num_lock) num_lock--; 7.2286 - if(num_lock) return; 7.2287 - 7.2288 - /* last time */ 7.2289 - 7.2290 - cur_chip = NULL; 7.2291 - OPLCloseTable(); 7.2292 - 7.2293 - if (LOG_CYM_FILE) 7.2294 - fclose (cymfile); 7.2295 - cymfile = NULL; 7.2296 -} 7.2297 - 7.2298 -static void OPL3ResetChip(OPL3 *chip) 7.2299 -{ 7.2300 - int c,s; 7.2301 - 7.2302 - chip->eg_timer = 0; 7.2303 - chip->eg_cnt = 0; 7.2304 - 7.2305 - chip->noise_rng = 1; /* noise shift register */ 7.2306 - chip->nts = 0; /* note split */ 7.2307 - OPL3_STATUS_RESET(chip,0x60); 7.2308 - 7.2309 - /* reset with register write */ 7.2310 - OPL3WriteReg(chip,0x01,0); /* test register */ 7.2311 - OPL3WriteReg(chip,0x02,0); /* Timer1 */ 7.2312 - OPL3WriteReg(chip,0x03,0); /* Timer2 */ 7.2313 - OPL3WriteReg(chip,0x04,0); /* IRQ mask clear */ 7.2314 - 7.2315 - 7.2316 -//FIX IT registers 101, 104 and 105 7.2317 - 7.2318 - 7.2319 -//FIX IT (dont change CH.D, CH.C, CH.B and CH.A in C0-C8 registers) 7.2320 - for(c = 0xff ; c >= 0x20 ; c-- ) 7.2321 - OPL3WriteReg(chip,c,0); 7.2322 -//FIX IT (dont change CH.D, CH.C, CH.B and CH.A in C0-C8 registers) 7.2323 - for(c = 0x1ff ; c >= 0x120 ; c-- ) 7.2324 - OPL3WriteReg(chip,c,0); 7.2325 - 7.2326 - 7.2327 - 7.2328 - /* reset operator parameters */ 7.2329 - for( c = 0 ; c < 9*2 ; c++ ) 7.2330 - { 7.2331 - OPL3_CH *CH = &chip->P_CH[c]; 7.2332 - for(s = 0 ; s < 2 ; s++ ) 7.2333 - { 7.2334 - CH->SLOT[s].state = EG_OFF; 7.2335 - CH->SLOT[s].volume = MAX_ATT_INDEX; 7.2336 - } 7.2337 - } 7.2338 -} 7.2339 - 7.2340 -/* Create one of virtual YMF262 */ 7.2341 -/* 'clock' is chip clock in Hz */ 7.2342 -/* 'rate' is sampling rate */ 7.2343 -static OPL3 *OPL3Create(running_device *device, int clock, int rate, int type) 7.2344 -{ 7.2345 - OPL3 *chip; 7.2346 - 7.2347 - if (OPL3_LockTable(device) == -1) return NULL; 7.2348 - 7.2349 - /* allocate memory block */ 7.2350 - chip = (OPL3 *)malloc(sizeof(OPL3));//auto_alloc_clear(device->machine, OPL3); 7.2351 - memset(chip,0,sizeof(OPL3)); 7.2352 - 7.2353 - chip->device = device; 7.2354 - chip->type = type; 7.2355 - chip->clock = clock; 7.2356 - chip->rate = rate; 7.2357 - 7.2358 - /* init global tables */ 7.2359 - OPL3_initalize(chip); 7.2360 - 7.2361 - /* reset chip */ 7.2362 - OPL3ResetChip(chip); 7.2363 - return chip; 7.2364 -} 7.2365 - 7.2366 -/* Destroy one of virtual YMF262 */ 7.2367 -static void OPL3Destroy(OPL3 *chip) 7.2368 -{ 7.2369 - OPL3_UnLockTable(); 7.2370 - free(chip); 7.2371 -// auto_free(chip->device->machine, chip); 7.2372 -} 7.2373 - 7.2374 - 7.2375 -/* Optional handlers */ 7.2376 - 7.2377 -static void OPL3SetTimerHandler(OPL3 *chip,OPL3_TIMERHANDLER timer_handler,void *param) 7.2378 -{ 7.2379 - chip->timer_handler = timer_handler; 7.2380 - chip->TimerParam = param; 7.2381 -} 7.2382 -static void OPL3SetIRQHandler(OPL3 *chip,OPL3_IRQHANDLER IRQHandler,void *param) 7.2383 -{ 7.2384 - chip->IRQHandler = IRQHandler; 7.2385 - chip->IRQParam = param; 7.2386 -} 7.2387 -static void OPL3SetUpdateHandler(OPL3 *chip,OPL3_UPDATEHANDLER UpdateHandler,void *param) 7.2388 -{ 7.2389 - chip->UpdateHandler = UpdateHandler; 7.2390 - chip->UpdateParam = param; 7.2391 -} 7.2392 - 7.2393 -/* YMF262 I/O interface */ 7.2394 -static int OPL3Write(OPL3 *chip, int a, int v) 7.2395 -{ 7.2396 - /* data bus is 8 bits */ 7.2397 - v &= 0xff; 7.2398 - 7.2399 -// pclog("OPL3 write %04X %02X\n",a,v); 7.2400 - 7.2401 - switch(a&3) 7.2402 - { 7.2403 - case 0: /* address port 0 (register set #1) */ 7.2404 - chip->address = v; 7.2405 - break; 7.2406 - 7.2407 - case 1: /* data port - ignore A1 */ 7.2408 - case 3: /* data port - ignore A1 */ 7.2409 - if(chip->UpdateHandler) chip->UpdateHandler(chip->UpdateParam,0); 7.2410 - OPL3WriteReg(chip,chip->address,v); 7.2411 - break; 7.2412 - 7.2413 - case 2: /* address port 1 (register set #2) */ 7.2414 - 7.2415 - /* verified on real YMF262: 7.2416 - in OPL3 mode: 7.2417 - address line A1 is stored during *address* write and ignored during *data* write. 7.2418 - 7.2419 - in OPL2 mode: 7.2420 - register set#2 writes go to register set#1 (ignoring A1) 7.2421 - verified on registers from set#2: 0x01, 0x04, 0x20-0xef 7.2422 - The only exception is register 0x05. 7.2423 - */ 7.2424 - if( chip->OPL3_mode & 1 ) 7.2425 - { 7.2426 - /* OPL3 mode */ 7.2427 - chip->address = v | 0x100; 7.2428 - } 7.2429 - else 7.2430 - { 7.2431 - /* in OPL2 mode the only accessible in set #2 is register 0x05 */ 7.2432 - if( v==5 ) 7.2433 - chip->address = v | 0x100; 7.2434 - else 7.2435 - chip->address = v; /* verified range: 0x01, 0x04, 0x20-0xef(set #2 becomes set #1 in opl2 mode) */ 7.2436 - } 7.2437 - break; 7.2438 - } 7.2439 - 7.2440 - return chip->status>>7; 7.2441 -} 7.2442 - 7.2443 -static unsigned char OPL3Read(OPL3 *chip,int a) 7.2444 -{ 7.2445 - if( a==0 ) 7.2446 - { 7.2447 - /* status port */ 7.2448 - return chip->status; 7.2449 - } 7.2450 - 7.2451 - return 0x00; /* verified on real YMF262 */ 7.2452 -} 7.2453 - 7.2454 - 7.2455 - 7.2456 -static int OPL3TimerOver(OPL3 *chip,int c) 7.2457 -{ 7.2458 - if( c ) 7.2459 - { /* Timer B */ 7.2460 - OPL3_STATUS_SET(chip,0x20); 7.2461 - } 7.2462 - else 7.2463 - { /* Timer A */ 7.2464 - OPL3_STATUS_SET(chip,0x40); 7.2465 - } 7.2466 - /* reload timer */ 7.2467 - if (chip->timer_handler) (chip->timer_handler)(chip->TimerParam,c,attotime_mul(chip->TimerBase, chip->T[c])); 7.2468 - return chip->status>>7; 7.2469 -} 7.2470 - 7.2471 - 7.2472 - 7.2473 - 7.2474 -void * ymf262_init(running_device *device, int clock, int rate) 7.2475 -{ 7.2476 - return OPL3Create(device,clock,rate,OPL3_TYPE_YMF262); 7.2477 -} 7.2478 - 7.2479 -void ymf262_shutdown(void *chip) 7.2480 -{ 7.2481 - OPL3Destroy((OPL3 *)chip); 7.2482 -} 7.2483 -void ymf262_reset_chip(void *chip) 7.2484 -{ 7.2485 - OPL3ResetChip((OPL3 *)chip); 7.2486 -} 7.2487 - 7.2488 -int ymf262_write(void *chip, int a, int v) 7.2489 -{ 7.2490 - return OPL3Write((OPL3 *)chip, a, v); 7.2491 -} 7.2492 - 7.2493 -unsigned char ymf262_read(void *chip, int a) 7.2494 -{ 7.2495 - /* Note on status register: */ 7.2496 - 7.2497 - /* YM3526(OPL) and YM3812(OPL2) return bit2 and bit1 in HIGH state */ 7.2498 - 7.2499 - /* YMF262(OPL3) always returns bit2 and bit1 in LOW state */ 7.2500 - /* which can be used to identify the chip */ 7.2501 - 7.2502 - /* YMF278(OPL4) returns bit2 in LOW and bit1 in HIGH state ??? info from manual - not verified */ 7.2503 - 7.2504 - return OPL3Read((OPL3 *)chip, a&3); 7.2505 -} 7.2506 -int ymf262_timer_over(void *chip, int c) 7.2507 -{ 7.2508 - return OPL3TimerOver((OPL3 *)chip, c); 7.2509 -} 7.2510 - 7.2511 -void ymf262_set_timer_handler(void *chip, OPL3_TIMERHANDLER timer_handler, void *param) 7.2512 -{ 7.2513 - OPL3SetTimerHandler((OPL3 *)chip, timer_handler, param); 7.2514 -} 7.2515 -void ymf262_set_irq_handler(void *chip,OPL3_IRQHANDLER IRQHandler,void *param) 7.2516 -{ 7.2517 - OPL3SetIRQHandler((OPL3 *)chip, IRQHandler, param); 7.2518 -} 7.2519 -void ymf262_set_update_handler(void *chip,OPL3_UPDATEHANDLER UpdateHandler,void *param) 7.2520 -{ 7.2521 - OPL3SetUpdateHandler((OPL3 *)chip, UpdateHandler, param); 7.2522 -} 7.2523 - 7.2524 - 7.2525 -/* 7.2526 -** Generate samples for one of the YMF262's 7.2527 -** 7.2528 -** 'which' is the virtual YMF262 number 7.2529 -** '**buffers' is table of 4 pointers to the buffers: CH.A, CH.B, CH.C and CH.D 7.2530 -** 'length' is the number of samples that should be generated 7.2531 -*/ 7.2532 -void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length) 7.2533 -{ 7.2534 - OPL3 *chip = (OPL3 *)_chip; 7.2535 - UINT8 rhythm = chip->rhythm&0x20; 7.2536 - 7.2537 - OPL3SAMPLE *ch_a = buffers[0]; 7.2538 - OPL3SAMPLE *ch_b = buffers[1]; 7.2539 - OPL3SAMPLE *ch_c = buffers[2]; 7.2540 - OPL3SAMPLE *ch_d = buffers[3]; 7.2541 - 7.2542 - int i; 7.2543 - 7.2544 - if( (void *)chip != cur_chip ){ 7.2545 - cur_chip = (void *)chip; 7.2546 - /* rhythm slots */ 7.2547 - SLOT7_1 = &chip->P_CH[7].SLOT[SLOT1]; 7.2548 - SLOT7_2 = &chip->P_CH[7].SLOT[SLOT2]; 7.2549 - SLOT8_1 = &chip->P_CH[8].SLOT[SLOT1]; 7.2550 - SLOT8_2 = &chip->P_CH[8].SLOT[SLOT2]; 7.2551 - } 7.2552 - for( i=0; i < length ; i++ ) 7.2553 - { 7.2554 - int a,b,c,d; 7.2555 - 7.2556 - 7.2557 - advance_lfo(chip); 7.2558 - 7.2559 - /* clear channel outputs */ 7.2560 - memset(chanout, 0, sizeof(signed int) * 18); 7.2561 - 7.2562 -#if 1 7.2563 - /* register set #1 */ 7.2564 - chan_calc(&chip->P_CH[0]); /* extended 4op ch#0 part 1 or 2op ch#0 */ 7.2565 - if (chip->P_CH[0].extended) 7.2566 - chan_calc_ext(&chip->P_CH[3]); /* extended 4op ch#0 part 2 */ 7.2567 - else 7.2568 - chan_calc(&chip->P_CH[3]); /* standard 2op ch#3 */ 7.2569 - 7.2570 - 7.2571 - chan_calc(&chip->P_CH[1]); /* extended 4op ch#1 part 1 or 2op ch#1 */ 7.2572 - if (chip->P_CH[1].extended) 7.2573 - chan_calc_ext(&chip->P_CH[4]); /* extended 4op ch#1 part 2 */ 7.2574 - else 7.2575 - chan_calc(&chip->P_CH[4]); /* standard 2op ch#4 */ 7.2576 - 7.2577 - 7.2578 - chan_calc(&chip->P_CH[2]); /* extended 4op ch#2 part 1 or 2op ch#2 */ 7.2579 - if (chip->P_CH[2].extended) 7.2580 - chan_calc_ext(&chip->P_CH[5]); /* extended 4op ch#2 part 2 */ 7.2581 - else 7.2582 - chan_calc(&chip->P_CH[5]); /* standard 2op ch#5 */ 7.2583 - 7.2584 - 7.2585 - if(!rhythm) 7.2586 - { 7.2587 - chan_calc(&chip->P_CH[6]); 7.2588 - chan_calc(&chip->P_CH[7]); 7.2589 - chan_calc(&chip->P_CH[8]); 7.2590 - } 7.2591 - else /* Rhythm part */ 7.2592 - { 7.2593 - chan_calc_rhythm(&chip->P_CH[0], (chip->noise_rng>>0)&1 ); 7.2594 - } 7.2595 - 7.2596 - /* register set #2 */ 7.2597 - chan_calc(&chip->P_CH[ 9]); 7.2598 - if (chip->P_CH[9].extended) 7.2599 - chan_calc_ext(&chip->P_CH[12]); 7.2600 - else 7.2601 - chan_calc(&chip->P_CH[12]); 7.2602 - 7.2603 - 7.2604 - chan_calc(&chip->P_CH[10]); 7.2605 - if (chip->P_CH[10].extended) 7.2606 - chan_calc_ext(&chip->P_CH[13]); 7.2607 - else 7.2608 - chan_calc(&chip->P_CH[13]); 7.2609 - 7.2610 - 7.2611 - chan_calc(&chip->P_CH[11]); 7.2612 - if (chip->P_CH[11].extended) 7.2613 - chan_calc_ext(&chip->P_CH[14]); 7.2614 - else 7.2615 - chan_calc(&chip->P_CH[14]); 7.2616 - 7.2617 - 7.2618 - /* channels 15,16,17 are fixed 2-operator channels only */ 7.2619 - chan_calc(&chip->P_CH[15]); 7.2620 - chan_calc(&chip->P_CH[16]); 7.2621 - chan_calc(&chip->P_CH[17]); 7.2622 -#endif 7.2623 - 7.2624 - /* accumulator register set #1 */ 7.2625 - a = chanout[0] & chip->pan[0]; 7.2626 - b = chanout[0] & chip->pan[1]; 7.2627 - c = chanout[0] & chip->pan[2]; 7.2628 - d = chanout[0] & chip->pan[3]; 7.2629 -#if 1 7.2630 - a += chanout[1] & chip->pan[4]; 7.2631 - b += chanout[1] & chip->pan[5]; 7.2632 - c += chanout[1] & chip->pan[6]; 7.2633 - d += chanout[1] & chip->pan[7]; 7.2634 - a += chanout[2] & chip->pan[8]; 7.2635 - b += chanout[2] & chip->pan[9]; 7.2636 - c += chanout[2] & chip->pan[10]; 7.2637 - d += chanout[2] & chip->pan[11]; 7.2638 - 7.2639 - a += chanout[3] & chip->pan[12]; 7.2640 - b += chanout[3] & chip->pan[13]; 7.2641 - c += chanout[3] & chip->pan[14]; 7.2642 - d += chanout[3] & chip->pan[15]; 7.2643 - a += chanout[4] & chip->pan[16]; 7.2644 - b += chanout[4] & chip->pan[17]; 7.2645 - c += chanout[4] & chip->pan[18]; 7.2646 - d += chanout[4] & chip->pan[19]; 7.2647 - a += chanout[5] & chip->pan[20]; 7.2648 - b += chanout[5] & chip->pan[21]; 7.2649 - c += chanout[5] & chip->pan[22]; 7.2650 - d += chanout[5] & chip->pan[23]; 7.2651 - 7.2652 - a += chanout[6] & chip->pan[24]; 7.2653 - b += chanout[6] & chip->pan[25]; 7.2654 - c += chanout[6] & chip->pan[26]; 7.2655 - d += chanout[6] & chip->pan[27]; 7.2656 - a += chanout[7] & chip->pan[28]; 7.2657 - b += chanout[7] & chip->pan[29]; 7.2658 - c += chanout[7] & chip->pan[30]; 7.2659 - d += chanout[7] & chip->pan[31]; 7.2660 - a += chanout[8] & chip->pan[32]; 7.2661 - b += chanout[8] & chip->pan[33]; 7.2662 - c += chanout[8] & chip->pan[34]; 7.2663 - d += chanout[8] & chip->pan[35]; 7.2664 - 7.2665 - /* accumulator register set #2 */ 7.2666 - a += chanout[9] & chip->pan[36]; 7.2667 - b += chanout[9] & chip->pan[37]; 7.2668 - c += chanout[9] & chip->pan[38]; 7.2669 - d += chanout[9] & chip->pan[39]; 7.2670 - a += chanout[10] & chip->pan[40]; 7.2671 - b += chanout[10] & chip->pan[41]; 7.2672 - c += chanout[10] & chip->pan[42]; 7.2673 - d += chanout[10] & chip->pan[43]; 7.2674 - a += chanout[11] & chip->pan[44]; 7.2675 - b += chanout[11] & chip->pan[45]; 7.2676 - c += chanout[11] & chip->pan[46]; 7.2677 - d += chanout[11] & chip->pan[47]; 7.2678 - 7.2679 - a += chanout[12] & chip->pan[48]; 7.2680 - b += chanout[12] & chip->pan[49]; 7.2681 - c += chanout[12] & chip->pan[50]; 7.2682 - d += chanout[12] & chip->pan[51]; 7.2683 - a += chanout[13] & chip->pan[52]; 7.2684 - b += chanout[13] & chip->pan[53]; 7.2685 - c += chanout[13] & chip->pan[54]; 7.2686 - d += chanout[13] & chip->pan[55]; 7.2687 - a += chanout[14] & chip->pan[56]; 7.2688 - b += chanout[14] & chip->pan[57]; 7.2689 - c += chanout[14] & chip->pan[58]; 7.2690 - d += chanout[14] & chip->pan[59]; 7.2691 - 7.2692 - a += chanout[15] & chip->pan[60]; 7.2693 - b += chanout[15] & chip->pan[61]; 7.2694 - c += chanout[15] & chip->pan[62]; 7.2695 - d += chanout[15] & chip->pan[63]; 7.2696 - a += chanout[16] & chip->pan[64]; 7.2697 - b += chanout[16] & chip->pan[65]; 7.2698 - c += chanout[16] & chip->pan[66]; 7.2699 - d += chanout[16] & chip->pan[67]; 7.2700 - a += chanout[17] & chip->pan[68]; 7.2701 - b += chanout[17] & chip->pan[69]; 7.2702 - c += chanout[17] & chip->pan[70]; 7.2703 - d += chanout[17] & chip->pan[71]; 7.2704 -#endif 7.2705 - a >>= FINAL_SH; 7.2706 - b >>= FINAL_SH; 7.2707 - c >>= FINAL_SH; 7.2708 - d >>= FINAL_SH; 7.2709 - 7.2710 - /* limit check */ 7.2711 - a = limit( a , MAXOUT, MINOUT ); 7.2712 - b = limit( b , MAXOUT, MINOUT ); 7.2713 - c = limit( c , MAXOUT, MINOUT ); 7.2714 - d = limit( d , MAXOUT, MINOUT ); 7.2715 - 7.2716 - #ifdef SAVE_SAMPLE 7.2717 - if (which==0) 7.2718 - { 7.2719 - SAVE_ALL_CHANNELS 7.2720 - } 7.2721 - #endif 7.2722 - 7.2723 - /* store to sound buffer */ 7.2724 - ch_a[i] = a; 7.2725 - ch_b[i] = b; 7.2726 - ch_c[i] = c; 7.2727 - ch_d[i] = d; 7.2728 - 7.2729 - advance(chip); 7.2730 - } 7.2731 - 7.2732 -} 7.2733 -
8.1 --- a/src/mame/ymf262.h Tue Feb 11 19:44:32 2014 +0000 8.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 8.3 @@ -1,62 +0,0 @@ 8.4 -#pragma once 8.5 - 8.6 -#ifndef __YMF262_H__ 8.7 -#define __YMF262_H__ 8.8 - 8.9 -#ifndef STUFF 8.10 -#define STUFF 8.11 -typedef int64_t attotime; 8.12 -#define ATTOTIME_IN_HZ(x) (1000000000/(x)) 8.13 -#define attotime_mul(x,y) ((x)*(y)) 8.14 -#define attotime_to_double(x) ((double)(x)/1000000000.0) 8.15 -#define attotime_zero 0 8.16 - 8.17 -#define running_device void 8.18 -#define INLINE static 8.19 -//#define M_PI 3.142 8.20 -#endif 8.21 - 8.22 -/* select number of output bits: 8 or 16 */ 8.23 -#define OPL3_SAMPLE_BITS 16 8.24 - 8.25 -/* compiler dependence */ 8.26 -#ifndef __OSDCOMM_H__ 8.27 -#define __OSDCOMM_H__ 8.28 -typedef unsigned char UINT8; /* unsigned 8bit */ 8.29 -typedef unsigned short UINT16; /* unsigned 16bit */ 8.30 -typedef unsigned int UINT32; /* unsigned 32bit */ 8.31 -typedef signed char INT8; /* signed 8bit */ 8.32 -typedef signed short INT16; /* signed 16bit */ 8.33 -typedef signed int INT32; /* signed 32bit */ 8.34 -#endif 8.35 - 8.36 -typedef signed short OPL3SAMPLE; 8.37 -//typedef stream_sample_t OPL3SAMPLE; 8.38 -/* 8.39 -#if (OPL3_SAMPLE_BITS==16) 8.40 -typedef INT16 OPL3SAMPLE; 8.41 -#endif 8.42 -#if (OPL3_SAMPLE_BITS==8) 8.43 -typedef INT8 OPL3SAMPLE; 8.44 -#endif 8.45 -*/ 8.46 - 8.47 -typedef void (*OPL3_TIMERHANDLER)(void *param,int timer,attotime period); 8.48 -typedef void (*OPL3_IRQHANDLER)(void *param,int irq); 8.49 -typedef void (*OPL3_UPDATEHANDLER)(void *param,int min_interval_us); 8.50 - 8.51 - 8.52 -void *ymf262_init(running_device *device, int clock, int rate); 8.53 -void ymf262_shutdown(void *chip); 8.54 -void ymf262_reset_chip(void *chip); 8.55 -int ymf262_write(void *chip, int a, int v); 8.56 -unsigned char ymf262_read(void *chip, int a); 8.57 -int ymf262_timer_over(void *chip, int c); 8.58 -void ymf262_update_one(void *chip, OPL3SAMPLE **buffers, int length); 8.59 - 8.60 -void ymf262_set_timer_handler(void *chip, OPL3_TIMERHANDLER TimerHandler, void *param); 8.61 -void ymf262_set_irq_handler(void *chip, OPL3_IRQHANDLER IRQHandler, void *param); 8.62 -void ymf262_set_update_handler(void *chip, OPL3_UPDATEHANDLER UpdateHandler, void *param); 8.63 - 8.64 - 8.65 -#endif /* __YMF262_H__ */
9.1 --- a/src/sound.c Tue Feb 11 19:44:32 2014 +0000 9.2 +++ b/src/sound.c Thu Feb 27 19:42:06 2014 +0000 9.3 @@ -34,7 +34,7 @@ 9.4 {"Sound Blaster 1.5", &sb_15_device}, 9.5 {"Sound Blaster 2.0", &sb_2_device}, 9.6 {"Sound Blaster Pro v1", &sb_pro_v1_device}, 9.7 - {"Sound Blaster Pro v2", &sb_pro_v1_device}, 9.8 + {"Sound Blaster Pro v2", &sb_pro_v2_device}, 9.9 {"Sound Blaster 16", &sb_16_device}, 9.10 {"Sound Blaster AWE32", &sb_awe32_device}, 9.11 {"Adlib Gold", &adgold_device},
10.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 10.2 +++ b/src/sound_dbopl.cc Thu Feb 27 19:42:06 2014 +0000 10.3 @@ -0,0 +1,144 @@ 10.4 +#include "dosbox/dbopl.h" 10.5 +#include "sound_dbopl.h" 10.6 + 10.7 +static struct 10.8 +{ 10.9 + DBOPL::Chip chip; 10.10 + int addr; 10.11 + int timer[2]; 10.12 + uint8_t timer_ctrl; 10.13 + uint8_t status_mask; 10.14 + uint8_t status; 10.15 + int is_opl3; 10.16 + 10.17 + void (*timer_callback)(void *param, int timer, int64_t period); 10.18 + void *timer_param; 10.19 +} opl[2]; 10.20 + 10.21 +enum 10.22 +{ 10.23 + STATUS_TIMER_1 = 0x40, 10.24 + STATUS_TIMER_2 = 0x20, 10.25 + STATUS_TIMER_ALL = 0x80 10.26 +}; 10.27 + 10.28 +enum 10.29 +{ 10.30 + CTRL_IRQ_RESET = 0x80, 10.31 + CTRL_TIMER1_MASK = 0x40, 10.32 + CTRL_TIMER2_MASK = 0x20, 10.33 + CTRL_TIMER2_CTRL = 0x02, 10.34 + CTRL_TIMER1_CTRL = 0x01 10.35 +}; 10.36 + 10.37 +void opl_init(void (*timer_callback)(void *param, int timer, int64_t period), void *timer_param, int nr, int is_opl3) 10.38 +{ 10.39 + DBOPL::InitTables(); 10.40 + opl[nr].chip.Setup(48000, is_opl3); 10.41 + opl[nr].timer_callback = timer_callback; 10.42 + opl[nr].timer_param = timer_param; 10.43 + opl[nr].is_opl3 = is_opl3; 10.44 +} 10.45 + 10.46 +void opl_status_update(int nr) 10.47 +{ 10.48 + if (opl[nr].status & (STATUS_TIMER_1 | STATUS_TIMER_2) & opl[nr].status_mask) 10.49 + opl[nr].status |= STATUS_TIMER_ALL; 10.50 + else 10.51 + opl[nr].status &= ~STATUS_TIMER_ALL; 10.52 +} 10.53 + 10.54 +void opl_timer_over(int nr, int timer) 10.55 +{ 10.56 + if (!timer) 10.57 + { 10.58 + opl[nr].status |= STATUS_TIMER_1; 10.59 + opl[nr].timer_callback(opl[nr].timer_param, 0, opl[nr].timer[0] * 4); 10.60 + } 10.61 + else 10.62 + { 10.63 + opl[nr].status |= STATUS_TIMER_2; 10.64 + opl[nr].timer_callback(opl[nr].timer_param, 1, opl[nr].timer[1] * 16); 10.65 + } 10.66 + 10.67 + opl_status_update(nr); 10.68 +} 10.69 + 10.70 +void opl_write(int nr, uint16_t addr, uint8_t val) 10.71 +{ 10.72 + if (!(addr & 1)) 10.73 + opl[nr].addr = (int)opl[nr].chip.WriteAddr(addr, val) & (opl[nr].is_opl3 ? 0x1ff : 0xff); 10.74 + else 10.75 + { 10.76 + opl[nr].chip.WriteReg(opl[nr].addr, val); 10.77 + 10.78 + switch (opl[nr].addr) 10.79 + { 10.80 + case 0x02: /*Timer 1*/ 10.81 + opl[nr].timer[0] = 256 - val; 10.82 + break; 10.83 + case 0x03: /*Timer 2*/ 10.84 + opl[nr].timer[1] = 256 - val; 10.85 + break; 10.86 + case 0x04: /*Timer control*/ 10.87 + if (val & CTRL_IRQ_RESET) /*IRQ reset*/ 10.88 + { 10.89 + opl[nr].status &= ~(STATUS_TIMER_1 | STATUS_TIMER_2); 10.90 + opl_status_update(nr); 10.91 + return; 10.92 + } 10.93 + if ((val ^ opl[nr].timer_ctrl) & CTRL_TIMER1_CTRL) 10.94 + { 10.95 + if (val & CTRL_TIMER1_CTRL) 10.96 + opl[nr].timer_callback(opl[nr].timer_param, 0, opl[nr].timer[0] * 4); 10.97 + else 10.98 + opl[nr].timer_callback(opl[nr].timer_param, 0, 0); 10.99 + } 10.100 + if ((val ^ opl[nr].timer_ctrl) & CTRL_TIMER2_CTRL) 10.101 + { 10.102 + if (val & CTRL_TIMER2_CTRL) 10.103 + opl[nr].timer_callback(opl[nr].timer_param, 1, opl[nr].timer[1] * 16); 10.104 + else 10.105 + opl[nr].timer_callback(opl[nr].timer_param, 1, 0); 10.106 + } 10.107 + opl[nr].status_mask = (~val & (CTRL_TIMER1_MASK | CTRL_TIMER2_MASK)) | 0x80; 10.108 + opl[nr].timer_ctrl = val; 10.109 + break; 10.110 + } 10.111 + } 10.112 + 10.113 +} 10.114 + 10.115 +uint8_t opl_read(int nr, uint16_t addr) 10.116 +{ 10.117 + if (!(addr & 1)) 10.118 + { 10.119 + return (opl[nr].status & opl[nr].status_mask) | 0x06; 10.120 + } 10.121 + return 0xff; 10.122 +} 10.123 + 10.124 +void opl2_update(int nr, int16_t *buffer, int samples) 10.125 +{ 10.126 + int c; 10.127 + Bit32s buffer_32[samples]; 10.128 + 10.129 + opl[nr].chip.GenerateBlock2(samples, buffer_32); 10.130 + 10.131 + for (c = 0; c < samples; c++) 10.132 + buffer[c] = (int16_t)buffer_32[c]; 10.133 +} 10.134 + 10.135 +void opl3_update(int nr, int16_t *bufferl, int16_t *bufferr, int samples) 10.136 +{ 10.137 + int c; 10.138 + Bit32s buffer_32[samples*2]; 10.139 + 10.140 + opl[nr].chip.GenerateBlock3(samples, buffer_32); 10.141 + 10.142 + for (c = 0; c < samples; c++) 10.143 + { 10.144 + bufferl[c] = (int16_t)buffer_32[c*2]; 10.145 + bufferr[c] = (int16_t)buffer_32[(c*2)+1]; 10.146 + } 10.147 +}
11.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 11.2 +++ b/src/sound_dbopl.h Thu Feb 27 19:42:06 2014 +0000 11.3 @@ -0,0 +1,12 @@ 11.4 +#ifdef __cplusplus 11.5 +extern "C" { 11.6 +#endif 11.7 + void opl_init(void (*timer_callback)(void *param, int timer, int64_t period), void *timer_param, int nr, int is_opl3); 11.8 + void opl_write(int nr, uint16_t addr, uint8_t val); 11.9 + uint8_t opl_read(int nr, uint16_t addr); 11.10 + void opl_timer_over(int nr, int timer); 11.11 + void opl2_update(int nr, int16_t *buffer, int samples); 11.12 + void opl3_update(int nr, int16_t *bufferl, int16_t *bufferr, int samples); 11.13 +#ifdef __cplusplus 11.14 +} 11.15 +#endif
12.1 --- a/src/sound_opl.c Tue Feb 11 19:44:32 2014 +0000 12.2 +++ b/src/sound_opl.c Thu Feb 27 19:42:06 2014 +0000 12.3 @@ -3,6 +3,7 @@ 12.4 #include "ibm.h" 12.5 #include "io.h" 12.6 #include "sound_opl.h" 12.7 +#include "sound_dbopl.h" 12.8 12.9 /*Interfaces between PCem and the actual OPL emulator*/ 12.10 12.11 @@ -12,14 +13,14 @@ 12.12 opl_t *opl = (opl_t *)priv; 12.13 12.14 cycles -= (int)(isa_timing * 8); 12.15 - return ym3812_read(opl->YM3812[0], a); 12.16 + return opl_read(0, a); 12.17 } 12.18 void opl2_write(uint16_t a, uint8_t v, void *priv) 12.19 { 12.20 opl_t *opl = (opl_t *)priv; 12.21 12.22 - ym3812_write(opl->YM3812[0],a,v); 12.23 - ym3812_write(opl->YM3812[1],a,v); 12.24 + opl_write(0, a, v); 12.25 + opl_write(1, a, v); 12.26 } 12.27 12.28 uint8_t opl2_l_read(uint16_t a, void *priv) 12.29 @@ -27,13 +28,13 @@ 12.30 opl_t *opl = (opl_t *)priv; 12.31 12.32 cycles -= (int)(isa_timing * 8); 12.33 - return ym3812_read(opl->YM3812[0], a); 12.34 + return opl_read(0, a); 12.35 } 12.36 void opl2_l_write(uint16_t a, uint8_t v, void *priv) 12.37 { 12.38 opl_t *opl = (opl_t *)priv; 12.39 12.40 - ym3812_write(opl->YM3812[0],a,v); 12.41 + opl_write(0, a, v); 12.42 } 12.43 12.44 uint8_t opl2_r_read(uint16_t a, void *priv) 12.45 @@ -41,13 +42,13 @@ 12.46 opl_t *opl = (opl_t *)priv; 12.47 12.48 cycles -= (int)(isa_timing * 8); 12.49 - return ym3812_read(opl->YM3812[1], a); 12.50 + return opl_read(1, a); 12.51 } 12.52 void opl2_r_write(uint16_t a, uint8_t v, void *priv) 12.53 { 12.54 opl_t *opl = (opl_t *)priv; 12.55 12.56 - ym3812_write(opl->YM3812[1],a,v); 12.57 + opl_write(1, a, v); 12.58 } 12.59 12.60 uint8_t opl3_read(uint16_t a, void *priv) 12.61 @@ -55,20 +56,20 @@ 12.62 opl_t *opl = (opl_t *)priv; 12.63 12.64 cycles -= (int)(isa_timing * 8); 12.65 - return ymf262_read(opl->YMF262, a); 12.66 + return opl_read(0, a); 12.67 } 12.68 void opl3_write(uint16_t a, uint8_t v, void *priv) 12.69 { 12.70 opl_t *opl = (opl_t *)priv; 12.71 12.72 - ymf262_write(opl->YMF262, a, v); 12.73 + opl_write(0, a, v); 12.74 } 12.75 12.76 12.77 void opl2_poll(opl_t *opl, int16_t *bufl, int16_t *bufr) 12.78 { 12.79 - ym3812_update_one(opl->YM3812[0], bufl, 1); 12.80 - ym3812_update_one(opl->YM3812[1], bufr, 1); 12.81 + opl2_update(0, bufl, 1); 12.82 + opl2_update(1, bufr, 1); 12.83 12.84 opl->filtbuf[0] = *bufl = ((*bufl) / 4) + ((opl->filtbuf[0] * 11) / 16); 12.85 opl->filtbuf[1] = *bufr = ((*bufr) / 4) + ((opl->filtbuf[1] * 11) / 16); 12.86 @@ -76,31 +77,31 @@ 12.87 if (opl->timers_enable[0][0]) 12.88 { 12.89 opl->timers[0][0]--; 12.90 - if (opl->timers[0][0] < 0) ym3812_timer_over(opl->YM3812[0], 0); 12.91 + if (opl->timers[0][0] < 0) opl_timer_over(0, 0); 12.92 } 12.93 if (opl->timers_enable[0][1]) 12.94 { 12.95 opl->timers[0][1]--; 12.96 - if (opl->timers[0][1] < 0) ym3812_timer_over(opl->YM3812[0], 1); 12.97 + if (opl->timers[0][1] < 0) opl_timer_over(0, 1); 12.98 } 12.99 if (opl->timers_enable[1][0]) 12.100 { 12.101 opl->timers[1][0]--; 12.102 - if (opl->timers[1][0] < 0) ym3812_timer_over(opl->YM3812[1], 0); 12.103 + if (opl->timers[1][0] < 0) opl_timer_over(1, 0); 12.104 } 12.105 if (opl->timers_enable[1][1]) 12.106 { 12.107 opl->timers[1][1]--; 12.108 - if (opl->timers[1][1] < 0) ym3812_timer_over(opl->YM3812[1], 1); 12.109 + if (opl->timers[1][1] < 0) opl_timer_over(1, 1); 12.110 } 12.111 } 12.112 12.113 void opl3_poll(opl_t *opl, int16_t *bufl, int16_t *bufr) 12.114 { 12.115 - ymf262_update_one(opl->YMF262, opl->bufs, 1); 12.116 + opl3_update(0, bufl, bufr, 1); 12.117 12.118 - opl->filtbuf[0] = *bufl = ((opl->bufs[0][0]) / 4) + ((opl->filtbuf[0] * 11) / 16); 12.119 - opl->filtbuf[1] = *bufr = ((opl->bufs[1][0]) / 4) + ((opl->filtbuf[1] * 11) / 16); 12.120 + opl->filtbuf[0] = *bufl = ((*bufl) / 4) + ((opl->filtbuf[0] * 11) / 16); 12.121 + opl->filtbuf[1] = *bufr = ((*bufr) / 4) + ((opl->filtbuf[1] * 11) / 16); 12.122 12.123 if (opl->timers_enable[0][0]) 12.124 { 12.125 @@ -108,7 +109,7 @@ 12.126 if (opl->timers[0][0] < 0) 12.127 { 12.128 opl->timers_enable[0][0] = 0; 12.129 - ymf262_timer_over(opl->YMF262, 0); 12.130 + opl_timer_over(0, 0); 12.131 } 12.132 } 12.133 if (opl->timers_enable[0][1]) 12.134 @@ -117,12 +118,12 @@ 12.135 if (opl->timers[0][1] < 0) 12.136 { 12.137 opl->timers_enable[0][1] = 0; 12.138 - ymf262_timer_over(opl->YMF262, 1); 12.139 + opl_timer_over(0, 1); 12.140 } 12.141 } 12.142 } 12.143 12.144 -void ym3812_timer_set_0(void *param, int timer, attotime period) 12.145 +void ym3812_timer_set_0(void *param, int timer, int64_t period) 12.146 { 12.147 opl_t *opl = (opl_t *)param; 12.148 12.149 @@ -130,7 +131,7 @@ 12.150 if (!opl->timers[0][timer]) opl->timers[0][timer] = 1; 12.151 opl->timers_enable[0][timer] = period ? 1 : 0; 12.152 } 12.153 -void ym3812_timer_set_1(void *param, int timer, attotime period) 12.154 +void ym3812_timer_set_1(void *param, int timer, int64_t period) 12.155 { 12.156 opl_t *opl = (opl_t *)param; 12.157 12.158 @@ -139,7 +140,7 @@ 12.159 opl->timers_enable[1][timer] = period ? 1 : 0; 12.160 } 12.161 12.162 -void ymf262_timer_set(void *param, int timer, attotime period) 12.163 +void ymf262_timer_set(void *param, int timer, int64_t period) 12.164 { 12.165 opl_t *opl = (opl_t *)param; 12.166 12.167 @@ -150,46 +151,12 @@ 12.168 12.169 void opl2_init(opl_t *opl) 12.170 { 12.171 - opl->bufs[0] = (int16_t *)malloc(4); 12.172 - opl->bufs[1] = (int16_t *)malloc(4); 12.173 - opl->bufs[2] = (int16_t *)malloc(4); 12.174 - opl->bufs[3] = (int16_t *)malloc(4); 12.175 - 12.176 - opl->YM3812[0] = ym3812_init(NULL, 3579545, 48000); 12.177 - ym3812_reset_chip(opl->YM3812[0]); 12.178 - ym3812_set_timer_handler(opl->YM3812[0], ym3812_timer_set_0, opl); 12.179 - 12.180 - opl->YM3812[1] = ym3812_init(NULL, 3579545, 48000); 12.181 - ym3812_reset_chip(opl->YM3812[1]); 12.182 - ym3812_set_timer_handler(opl->YM3812[1], ym3812_timer_set_1, opl); 12.183 + opl_init(ym3812_timer_set_0, opl, 0, 0); 12.184 + opl_init(ym3812_timer_set_1, opl, 1, 0); 12.185 } 12.186 12.187 void opl3_init(opl_t *opl) 12.188 { 12.189 - opl->bufs[0] = (int16_t *)malloc(4); 12.190 - opl->bufs[1] = (int16_t *)malloc(4); 12.191 - opl->bufs[2] = (int16_t *)malloc(4); 12.192 - opl->bufs[3] = (int16_t *)malloc(4); 12.193 - 12.194 - opl->YMF262 = ymf262_init(NULL, 3579545 * 4, 48000); 12.195 - ymf262_reset_chip(opl->YMF262); 12.196 - ymf262_set_timer_handler(opl->YMF262, ymf262_timer_set, opl); 12.197 + opl_init(ymf262_timer_set, opl, 0, 1); 12.198 } 12.199 12.200 -void opl2_close(opl_t *opl) 12.201 -{ 12.202 - free(opl->bufs[0]); 12.203 - free(opl->bufs[1]); 12.204 - 12.205 - ym3812_shutdown(opl->YM3812[0]); 12.206 - ym3812_shutdown(opl->YM3812[1]); 12.207 -} 12.208 - 12.209 -void opl3_close(opl_t *opl) 12.210 -{ 12.211 - free(opl->bufs[0]); 12.212 - free(opl->bufs[1]); 12.213 - 12.214 - ym3812_shutdown(opl->YM3812[0]); 12.215 - ymf262_shutdown(opl->YMF262); 12.216 -}
13.1 --- a/src/sound_opl.h Tue Feb 11 19:44:32 2014 +0000 13.2 +++ b/src/sound_opl.h Thu Feb 27 19:42:06 2014 +0000 13.3 @@ -1,21 +1,13 @@ 13.4 -#include "mame/fmopl.h" 13.5 -#include "mame/ymf262.h" 13.6 - 13.7 typedef struct opl_t 13.8 { 13.9 - void *YM3812[2]; 13.10 - void *YMF262; 13.11 + int chip_nr[2]; 13.12 13.13 int timers[2][2]; 13.14 int timers_enable[2][2]; 13.15 13.16 - int16_t *bufs[4]; 13.17 int16_t filtbuf[2]; 13.18 } opl_t; 13.19 13.20 -uint8_t opl_read(uint16_t a, void *priv); 13.21 -void opl_write(uint16_t a, uint8_t v, void *priv); 13.22 - 13.23 uint8_t opl2_read(uint16_t a, void *priv); 13.24 void opl2_write(uint16_t a, uint8_t v, void *priv); 13.25 uint8_t opl2_l_read(uint16_t a, void *priv); 13.26 @@ -30,6 +22,3 @@ 13.27 13.28 void opl2_init(opl_t *opl); 13.29 void opl3_init(opl_t *opl); 13.30 - 13.31 -void opl2_close(opl_t *opl); 13.32 -void opl3_close(opl_t *opl);
