PCem
changeset 87:cf0361af6563
Fixed vblankstart on Mach64, ET4000/W32p and ViRGE.
Implemented clock generation on ViRGE.
| author | TomW |
|---|---|
| date | Sat Mar 22 17:04:25 2014 +0000 |
| parents | 42ac4acbb4c5 |
| children | 2c16e2e509d0 |
| files | src/vid_ati_mach64.c src/vid_et4000w32.c src/vid_s3_virge.c |
| diffstat | 3 files changed, 25 insertions(+), 12 deletions(-) [+] |
line diff
1.1 --- a/src/vid_ati_mach64.c Sat Mar 22 15:37:36 2014 +0000 1.2 +++ b/src/vid_ati_mach64.c Sat Mar 22 17:04:25 2014 +0000 1.3 @@ -299,6 +299,7 @@ 1.4 svga->ma_latch = (mach64->crtc_off_pitch & 0x1fffff) * 2; 1.5 svga->linedbl = svga->rowcount = 0; 1.6 svga->split = 0xffffff; 1.7 + svga->vblankstart = svga->dispend; 1.8 // svga_htotal <<= 1; 1.9 // svga_hdisp <<= 1; 1.10 svga->rowoffset <<= 1;
2.1 --- a/src/vid_et4000w32.c Sat Mar 22 15:37:36 2014 +0000 2.2 +++ b/src/vid_et4000w32.c Sat Mar 22 17:04:25 2014 +0000 2.3 @@ -236,12 +236,13 @@ 2.4 // pclog("Recalc %08X ",svga_ma); 2.5 svga->ma_latch |= (svga->crtc[0x33] & 0x7) << 16; 2.6 // pclog("SVGA_MA %08X %i\n", svga_ma, (svga_miscout >> 2) & 3); 2.7 - if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400; 2.8 - if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400; 2.9 - if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400; 2.10 - if (svga->crtc[0x35] & 0x10) svga->split += 0x400; 2.11 - if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100; 2.12 - if (svga->crtc[0x3F] & 0x01) svga->htotal += 256; 2.13 + if (svga->crtc[0x35] & 0x01) svga->vblankstart += 0x400; 2.14 + if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400; 2.15 + if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400; 2.16 + if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400; 2.17 + if (svga->crtc[0x35] & 0x10) svga->split += 0x400; 2.18 + if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100; 2.19 + if (svga->crtc[0x3F] & 0x01) svga->htotal += 256; 2.20 if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1; 2.21 2.22 switch ((svga->miscout >> 2) & 3)
3.1 --- a/src/vid_s3_virge.c Sat Mar 22 15:37:36 2014 +0000 3.2 +++ b/src/vid_s3_virge.c Sat Mar 22 17:04:25 2014 +0000 3.3 @@ -99,6 +99,7 @@ 3.4 } streams; 3.5 } virge_t; 3.6 3.7 +static void s3_virge_recalctimings(svga_t *svga); 3.8 static void s3_virge_updatemapping(virge_t *virge); 3.9 3.10 static void s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat); 3.11 @@ -161,6 +162,7 @@ 3.12 if (svga->seqaddr >= 0x10) 3.13 { 3.14 svga->seqregs[svga->seqaddr & 0x1f]=val; 3.15 + s3_virge_recalctimings(svga); 3.16 return; 3.17 } 3.18 if (svga->seqaddr == 4) /*Chain-4 - update banking*/ 3.19 @@ -321,12 +323,13 @@ 3.20 { 3.21 virge_t *virge = (virge_t *)svga->p; 3.22 3.23 - if (svga->crtc[0x5d] & 0x01) svga->htotal += 0x100; 3.24 - if (svga->crtc[0x5d] & 0x02) svga->hdisp += 0x100; 3.25 - if (svga->crtc[0x5e] & 0x01) svga->vtotal += 0x400; 3.26 - if (svga->crtc[0x5e] & 0x02) svga->dispend += 0x400; 3.27 - if (svga->crtc[0x5e] & 0x10) svga->vsyncstart += 0x400; 3.28 - if (svga->crtc[0x5e] & 0x40) svga->split += 0x400; 3.29 + if (svga->crtc[0x5d] & 0x01) svga->htotal += 0x100; 3.30 + if (svga->crtc[0x5d] & 0x02) svga->hdisp += 0x100; 3.31 + if (svga->crtc[0x5e] & 0x01) svga->vtotal += 0x400; 3.32 + if (svga->crtc[0x5e] & 0x02) svga->dispend += 0x400; 3.33 + if (svga->crtc[0x5e] & 0x04) svga->vblankstart += 0x400; 3.34 + if (svga->crtc[0x5e] & 0x10) svga->vsyncstart += 0x400; 3.35 + if (svga->crtc[0x5e] & 0x40) svga->split += 0x400; 3.36 svga->interlace = svga->crtc[0x42] & 0x20; 3.37 3.38 if ((svga->crtc[0x67] & 0xc) != 0xc) /*VGA mode*/ 3.39 @@ -399,7 +402,15 @@ 3.40 } 3.41 } 3.42 3.43 + if (((svga->miscout >> 2) & 3) == 3) 3.44 + { 3.45 + int n = svga->seqregs[0x12] & 0x1f; 3.46 + int r = (svga->seqregs[0x12] >> 5) & 3; 3.47 + int m = svga->seqregs[0x13] & 0x7f; 3.48 + double freq = (((double)m + 2) / (((double)n + 2) * (double)(1 << r))) * 14318184.0; 3.49 3.50 + svga->clock = cpuclock / freq; 3.51 + } 3.52 } 3.53 3.54 static void s3_virge_updatemapping(virge_t *virge)