PCem
changeset 135:abd5259486c3
Mach64 changes :
No longer implements CRTC registers beyond 0x18 - NT no longer detects ET4000.
RGBA8888 mode supported - fixes NT 32-bit colour mode.
Bit order controls supported for CPU 1-bit data - fixes NT 24-bit colour mode.
| author | TomW |
|---|---|
| date | Thu Jul 24 21:30:17 2014 +0100 |
| parents | ffe477b4639f |
| children | cba58d4def81 |
| files | src/vid_ati68860_ramdac.c src/vid_ati68860_ramdac.h src/vid_ati_mach64.c src/vid_svga_render.c src/vid_svga_render.h |
| diffstat | 5 files changed, 93 insertions(+), 12 deletions(-) [+] |
line diff
1.1 --- a/src/vid_ati68860_ramdac.c Wed Jul 23 08:15:35 2014 +0100 1.2 +++ b/src/vid_ati68860_ramdac.c Thu Jul 24 21:30:17 2014 +0100 1.3 @@ -23,6 +23,7 @@ 1.4 #include "video.h" 1.5 #include "vid_svga.h" 1.6 #include "vid_ati68860_ramdac.h" 1.7 +#include "vid_svga_render.h" 1.8 1.9 void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac, svga_t *svga) 1.10 { 1.11 @@ -43,6 +44,38 @@ 1.12 break; 1.13 default: 1.14 ramdac->regs[addr & 0xf] = val; 1.15 + switch (addr & 0xf) 1.16 + { 1.17 + case 0xb: 1.18 + switch (val) 1.19 + { 1.20 + case 0x82: 1.21 + ramdac->render = svga_render_4bpp_highres; 1.22 + break; 1.23 + case 0x83: 1.24 + ramdac->render = svga_render_8bpp_highres; 1.25 + break; 1.26 + case 0xa0: 1.27 + ramdac->render = svga_render_15bpp_highres; 1.28 + break; 1.29 + case 0xa1: case 0xb1: 1.30 + ramdac->render = svga_render_16bpp_highres; 1.31 + break; 1.32 + case 0xc0: case 0xd0: 1.33 + ramdac->render = svga_render_24bpp_highres; 1.34 + break; 1.35 + case 0xe2: 1.36 + ramdac->render = svga_render_32bpp_highres; 1.37 + break; 1.38 + case 0xf2: 1.39 + ramdac->render = svga_render_RGBA8888_highres; 1.40 + break; 1.41 + default: 1.42 + ramdac->render = svga_render_8bpp_highres; 1.43 + break; 1.44 + } 1.45 + break; 1.46 + } 1.47 break; 1.48 } 1.49 } 1.50 @@ -81,3 +114,8 @@ 1.51 // pclog("ati68860_in : addr %04X ret %02X %04X:%04X\n", addr, ret, CS,pc); 1.52 return ret; 1.53 } 1.54 + 1.55 +void ati68860_ramdac_init(ati68860_ramdac_t *ramdac) 1.56 +{ 1.57 + ramdac->render = svga_render_8bpp_highres; 1.58 +}
2.1 --- a/src/vid_ati68860_ramdac.h Wed Jul 23 08:15:35 2014 +0100 2.2 +++ b/src/vid_ati68860_ramdac.h Thu Jul 24 21:30:17 2014 +0100 2.3 @@ -1,7 +1,9 @@ 2.4 typedef struct ati68860_ramdac_t 2.5 { 2.6 uint8_t regs[16]; 2.7 + void (*render)(struct svga_t *svga); 2.8 } ati68860_ramdac_t; 2.9 2.10 void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac, svga_t *svga); 2.11 uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svga); 2.12 +void ati68860_ramdac_init(ati68860_ramdac_t *ramdac);
3.1 --- a/src/vid_ati_mach64.c Wed Jul 23 08:15:35 2014 +0100 3.2 +++ b/src/vid_ati_mach64.c Thu Jul 24 21:30:17 2014 +0100 3.3 @@ -11,7 +11,6 @@ 3.4 #include "vid_ati68860_ramdac.h" 3.5 #include "vid_ati_eeprom.h" 3.6 #include "vid_ics2595.h" 3.7 -#include "vid_svga_render.h" 3.8 3.9 //#define MACH64_DEBUG 3.10 3.11 @@ -182,6 +181,11 @@ 3.12 SRC_LINEAR_EN = 4 3.13 }; 3.14 3.15 +enum 3.16 +{ 3.17 + DP_BYTE_PIX_ORDER = (1 << 24) 3.18 +}; 3.19 + 3.20 static int mach64_width[8] = {0, 0, 0, 1, 1, 2, 2, 0}; 3.21 3.22 enum 3.23 @@ -238,10 +242,12 @@ 3.24 break; 3.25 3.26 case 0x3D4: 3.27 - svga->crtcreg = val & 0x3f; 3.28 + svga->crtcreg = val & 0x1f; 3.29 return; 3.30 case 0x3D5: 3.31 if (svga->crtcreg <= 7 && svga->crtc[0x11] & 0x80) return; 3.32 + if (svga->crtcreg > 0x18) 3.33 + return; 3.34 old = svga->crtc[svga->crtcreg]; 3.35 svga->crtc[svga->crtcreg] = val; 3.36 3.37 @@ -281,6 +287,8 @@ 3.38 case 0x3D4: 3.39 return svga->crtcreg; 3.40 case 0x3D5: 3.41 + if (svga->crtcreg > 0x18) 3.42 + return 0xff; 3.43 return svga->crtc[svga->crtcreg]; 3.44 } 3.45 return svga_in(addr, svga); 3.46 @@ -305,35 +313,36 @@ 3.47 svga->vblankstart = svga->dispend; 3.48 // svga_htotal <<= 1; 3.49 // svga_hdisp <<= 1; 3.50 - svga->rowoffset <<= 1; 3.51 + svga->rowoffset <<= 1; 3.52 + svga->render = mach64->ramdac.render; 3.53 switch ((mach64->crtc_gen_cntl >> 8) & 7) 3.54 { 3.55 case 1: 3.56 - svga->render = svga_render_4bpp_highres; 3.57 +// svga->render = svga_render_4bpp_highres; 3.58 svga->hdisp *= 8; 3.59 break; 3.60 case 2: 3.61 - svga->render = svga_render_8bpp_highres; 3.62 +// svga->render = svga_render_8bpp_highres; 3.63 svga->hdisp *= 8; 3.64 svga->rowoffset /= 2; 3.65 break; 3.66 case 3: 3.67 - svga->render = svga_render_15bpp_highres; 3.68 +// svga->render = svga_render_15bpp_highres; 3.69 svga->hdisp *= 8; 3.70 //svga_rowoffset *= 2; 3.71 break; 3.72 case 4: 3.73 - svga->render = svga_render_16bpp_highres; 3.74 +// svga->render = svga_render_16bpp_highres; 3.75 svga->hdisp *= 8; 3.76 //svga_rowoffset *= 2; 3.77 break; 3.78 case 5: 3.79 - svga->render = svga_render_24bpp_highres; 3.80 +// svga->render = svga_render_24bpp_highres; 3.81 svga->hdisp *= 8; 3.82 svga->rowoffset = (svga->rowoffset * 3) / 2; 3.83 break; 3.84 case 6: 3.85 - svga->render = svga_render_32bpp_highres; 3.86 +// svga->render = svga_render_32bpp_highres; 3.87 svga->hdisp *= 8; 3.88 svga->rowoffset *= 2; 3.89 break; 3.90 @@ -706,8 +715,16 @@ 3.91 switch (mach64->accel.source_mix) 3.92 { 3.93 case MONO_SRC_HOST: 3.94 - mix = cpu_dat >> 31; 3.95 - cpu_dat <<= 1; 3.96 + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) 3.97 + { 3.98 + mix = cpu_dat & 1; 3.99 + cpu_dat >>= 1; 3.100 + } 3.101 + else 3.102 + { 3.103 + mix = cpu_dat >> 31; 3.104 + cpu_dat <<= 1; 3.105 + } 3.106 break; 3.107 case MONO_SRC_PAT: 3.108 mix = mach64->accel.pattern[dst_y & 7][dst_x & 7]; 3.109 @@ -1722,7 +1739,7 @@ 3.110 case 0x210: case 0x214: case 0x218: case 0x21c: 3.111 case 0x220: case 0x224: case 0x228: case 0x22c: 3.112 case 0x230: case 0x234: case 0x238: case 0x23c: 3.113 - if (mach64->accel.source_host) 3.114 + if (mach64->accel.source_host || (mach64->dp_pix_width & DP_BYTE_PIX_ORDER)) 3.115 mach64_blit(val, 32, mach64); 3.116 else 3.117 mach64_blit(((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24), 32, mach64); 3.118 @@ -2243,6 +2260,8 @@ 3.119 3.120 ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1); 3.121 3.122 + ati68860_ramdac_init(&mach64->ramdac); 3.123 + 3.124 mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/ 3.125 3.126 mach64->dst_cntl = 3;
4.1 --- a/src/vid_svga_render.c Wed Jul 23 08:15:35 2014 +0100 4.2 +++ b/src/vid_svga_render.c Thu Jul 24 21:30:17 2014 +0100 4.3 @@ -638,3 +638,24 @@ 4.4 } 4.5 } 4.6 4.7 +void svga_render_RGBA8888_highres(svga_t *svga) 4.8 +{ 4.9 + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) 4.10 + { 4.11 + int x; 4.12 + int offset = (8 - ((svga->scrollcache & 6) >> 1)) + 24; 4.13 + uint32_t *p = &((uint32_t *)buffer32->line[svga->displine])[offset]; 4.14 + 4.15 + if (svga->firstline_draw == 2000) 4.16 + svga->firstline_draw = svga->displine; 4.17 + svga->lastline_draw = svga->displine; 4.18 + 4.19 + for (x = 0; x <= svga->hdisp; x++) 4.20 + { 4.21 + uint32_t dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vrammask]); 4.22 + p[x] = dat >> 8; 4.23 + } 4.24 + svga->ma += 4; 4.25 + svga->ma &= svga->vrammask; 4.26 + } 4.27 +}
5.1 --- a/src/vid_svga_render.h Wed Jul 23 08:15:35 2014 +0100 5.2 +++ b/src/vid_svga_render.h Thu Jul 24 21:30:17 2014 +0100 5.3 @@ -27,5 +27,6 @@ 5.4 void svga_render_24bpp_highres(svga_t *svga); 5.5 void svga_render_32bpp_lowres(svga_t *svga); 5.6 void svga_render_32bpp_highres(svga_t *svga); 5.7 +void svga_render_RGBA8888_highres(svga_t *svga); 5.8 5.9 extern void (*svga_render)(svga_t *svga);