# HG changeset patch
# User TomW
# Date 1408207010 -3600
# Node ID 8523e78e0e482a7ad9902adcbe6150a9ab6ee342
# Parent  bd46c39a78e83420b6e462f7bc8f25621d8be853
Fixed default selector in instruction following MOV SS instruction, fixes Windows 3.1 installer

diff -r bd46c39a78e8 -r 8523e78e0e48 src/x86_ops_mov_seg.h
--- a/src/x86_ops_mov_seg.h	Wed Aug 13 20:33:56 2014 +0100
+++ b/src/x86_ops_mov_seg.h	Sat Aug 16 17:36:50 2014 +0100
@@ -146,7 +146,11 @@
                 break;
                 case 0x10: /*SS*/
                 loadseg(new_seg, &_ss);
+                if (abrt) return 0;
+                oldpc = pc;
                 op32 = use32;
+                ssegs = 0;
+                ea_seg = &_ds;
                 return 1;
                 case 0x20: /*FS*/
                 loadseg(new_seg, &_fs);
@@ -177,7 +181,11 @@
                 break;
                 case 0x10: /*SS*/
                 loadseg(new_seg, &_ss);
+                if (abrt) return 0;
+                oldpc = pc;
                 op32 = use32;
+                ssegs = 0;
+                ea_seg = &_ds;
                 return 1;
                 case 0x20: /*FS*/
                 loadseg(new_seg, &_fs);
@@ -261,7 +269,6 @@
         seg = readmemw(easeg, eaaddr + 2);      if (abrt) return 0;
         loadseg(seg, &_ss);                     if (abrt) return 0;
         regs[reg].w = addr;
-        oldss = ss;
  
         cycles -= 7;       
         return 0;
@@ -276,7 +283,6 @@
         seg = readmemw(easeg, eaaddr + 2);      if (abrt) return 0;
         loadseg(seg, &_ss);                     if (abrt) return 0;
         regs[reg].w = addr;
-        oldss = ss;
  
         cycles -= 7;       
         return 0;
@@ -292,7 +298,6 @@
         seg = readmemw(easeg, eaaddr + 4);      if (abrt) return 0;
         loadseg(seg, &_ss);                     if (abrt) return 0;
         regs[reg].l = addr;
-        oldss = ss;
  
         cycles -= 7;       
         return 0;
@@ -308,7 +313,6 @@
         seg = readmemw(easeg, eaaddr + 4);      if (abrt) return 0;
         loadseg(seg, &_ss);                     if (abrt) return 0;
         regs[reg].l = addr;
-        oldss = ss;
  
         cycles -= 7;       
         return 0;