PCem

view src/vid_ati68860_ramdac.c @ 135:abd5259486c3

find changesets by author, revision, files, or words in the commit message
Mach64 changes : No longer implements CRTC registers beyond 0x18 - NT no longer detects ET4000. RGBA8888 mode supported - fixes NT 32-bit colour mode. Bit order controls supported for CPU 1-bit data - fixes NT 24-bit colour mode.
author TomW
date Thu Jul 24 21:30:17 2014 +0100
parents 16c3167038d7
children
line source
1 /*ATI 68860 RAMDAC emulation (for Mach64)*/
2 /*
3 ATI 68860/68880 Truecolor DACs:
4 REG08 (R/W):
5 bit 0-? Always 2 ??
6
7 REG0A (R/W):
8 bit 0-? Always 1Dh ??
9
10 REG0B (R/W): (GMR ?)
11 bit 0-7 Mode. 82h: 4bpp, 83h: 8bpp, A0h: 15bpp, A1h: 16bpp, C0h: 24bpp,
12 E3h: 32bpp (80h for VGA modes ?)
13
14 REG0C (R/W): Device Setup Register A
15 bit 0 Controls 6/8bit DAC. 0: 8bit DAC/LUT, 1: 6bit DAC/LUT
16 2-3 Depends on Video memory (= VRAM width ?) . 1: Less than 1Mb, 2: 1Mb,
17 3: > 1Mb
18 5-6 Always set ?
19 7 If set can remove "snow" in some cases (A860_Delay_L ?) ??
20 */
21 #include "ibm.h"
22 #include "mem.h"
23 #include "video.h"
24 #include "vid_svga.h"
25 #include "vid_ati68860_ramdac.h"
26 #include "vid_svga_render.h"
27
28 void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac, svga_t *svga)
29 {
30 // pclog("ati68860_out : addr %04X val %02X %04X:%04X\n", addr, val, CS,pc);
31 switch (addr)
32 {
33 case 0:
34 svga_out(0x3c8, val, svga);
35 break;
36 case 1:
37 svga_out(0x3c9, val, svga);
38 break;
39 case 2:
40 svga_out(0x3c6, val, svga);
41 break;
42 case 3:
43 svga_out(0x3c7, val, svga);
44 break;
45 default:
46 ramdac->regs[addr & 0xf] = val;
47 switch (addr & 0xf)
48 {
49 case 0xb:
50 switch (val)
51 {
52 case 0x82:
53 ramdac->render = svga_render_4bpp_highres;
54 break;
55 case 0x83:
56 ramdac->render = svga_render_8bpp_highres;
57 break;
58 case 0xa0:
59 ramdac->render = svga_render_15bpp_highres;
60 break;
61 case 0xa1: case 0xb1:
62 ramdac->render = svga_render_16bpp_highres;
63 break;
64 case 0xc0: case 0xd0:
65 ramdac->render = svga_render_24bpp_highres;
66 break;
67 case 0xe2:
68 ramdac->render = svga_render_32bpp_highres;
69 break;
70 case 0xf2:
71 ramdac->render = svga_render_RGBA8888_highres;
72 break;
73 default:
74 ramdac->render = svga_render_8bpp_highres;
75 break;
76 }
77 break;
78 }
79 break;
80 }
81 }
82
83 uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svga)
84 {
85 uint8_t ret = 0;
86 switch (addr)
87 {
88 case 0:
89 ret = svga_in(0x3c8, svga);
90 break;
91 case 1:
92 ret = svga_in(0x3c9, svga);
93 break;
94 case 2:
95 ret = svga_in(0x3c6, svga);
96 break;
97 case 3:
98 ret = svga_in(0x3c7, svga);
99 break;
100 case 4: case 8:
101 ret = 2;
102 break;
103 case 6: case 0xa:
104 ret = 0x1d;
105 break;
106 case 0xf:
107 ret = 0xd0;
108 break;
109
110 default:
111 ret = ramdac->regs[addr & 0xf];
112 break;
113 }
114 // pclog("ati68860_in : addr %04X ret %02X %04X:%04X\n", addr, ret, CS,pc);
115 return ret;
116 }
117
118 void ati68860_ramdac_init(ati68860_ramdac_t *ramdac)
119 {
120 ramdac->render = svga_render_8bpp_highres;
121 }