Two questions in two days! Sorry to be a pest

There are plenty of variations of the following code kicking around on the Internet which is described as performing a toggle function on a single bit of a specifiv byte in the CMOS to toggle the VIDC POST checks on and off.



The thing is, on my machine at least, it doesn't appear to work.

That is to say, it clearly toggles the relevant bit in the relevant byte in the CMOS and that value is carried over between power cycles. It doesn't however have any effect on whether or not the VIDC POST check is run. On the machine I've tested it on with RO3.11, the VIDC POST is always run regardless of the setting of the bit.

Does anyone know which versions of RISC OS this is meant to work with? Clearly as the POST was introduced with RISC OS 3.00 and the code being described as working with RISC OS 3, I thought it reasonable to assume that it would simply work on my machine. Sadly, that's not the case...

Paul

Hmmm,

AppNote 225 seems to indicate that the bit is used in RISC OS 3.10 and not 3.00. It makes no mention of RISC OS 3.11.

http://www.retro-kit.co.uk/user/custom/Acorn/32bit/documentation/RISCOS-POST-AppNote225.pdf

I guess I'll test it out with my RISC OS 3.10 machine and see if it works on that.

Paul

I've tried this code to disable the VIDC POST check on my A310 now running RISC OS 3.10 and it has no effect on that machine either.

I'm finding this most odd as the code is published in various forms and I've checked them all and I've re-coded it myself in assembler so the only thing I can think is that although the information was published either the disable VIDC check never made it into the OS or there's a typo in the information regarding which bit should be changed to disable the check.

If anyone has any suggestions as to where I should look next, I'm open to suggestions.

Paul